arm64: dts: rockchip: adjust whitespace around '='
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Thu, 26 May 2022 20:42:16 +0000 (22:42 +0200)
committerHeiko Stuebner <heiko@sntech.de>
Fri, 10 Jun 2022 16:44:05 +0000 (18:44 +0200)
Fix whitespace coding style: use single space instead of tabs or
multiple spaces around '=' sign in property assignment.  No functional
changes (same DTB).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220526204218.832029-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/px30.dtsi
arch/arm64/boot/dts/rockchip/rk3368.dtsi
arch/arm64/boot/dts/rockchip/rk3399-evb.dts
arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts
arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts
arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi

index 56dfbb2e2fa66440af6f57b608e8f19a3e6b7d8d..214f94fea3dca4db87e5a541579e723283c53481 100644 (file)
        i2c0: i2c@ff180000 {
                compatible = "rockchip,px30-i2c", "rockchip,rk3399-i2c";
                reg = <0x0 0xff180000 0x0 0x1000>;
-               clocks =  <&cru SCLK_I2C0>, <&cru PCLK_I2C0>;
+               clocks = <&cru SCLK_I2C0>, <&cru PCLK_I2C0>;
                clock-names = "i2c", "pclk";
                interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
                pinctrl-names = "default";
index 4f0b5feaa5e617d0d273dcda5f6e181a75fbbc94..a4c5aaf1f4579484acac1d406d0ea85b0777de50 100644 (file)
 
                gmac {
                        rgmii_pins: rgmii-pins {
-                               rockchip,pins = <3 RK_PC6 1 &pcfg_pull_none>,
+                               rockchip,pins = <3 RK_PC6 1 &pcfg_pull_none>,
                                                <3 RK_PD0 1 &pcfg_pull_none>,
                                                <3 RK_PC3 1 &pcfg_pull_none>,
                                                <3 RK_PB0 1 &pcfg_pull_none_12ma>,
                        };
 
                        rmii_pins: rmii-pins {
-                               rockchip,pins = <3 RK_PC6 1 &pcfg_pull_none>,
+                               rockchip,pins = <3 RK_PC6 1 &pcfg_pull_none>,
                                                <3 RK_PD0 1 &pcfg_pull_none>,
                                                <3 RK_PC3 1 &pcfg_pull_none>,
                                                <3 RK_PB0 1 &pcfg_pull_none_12ma>,
 
                spdif {
                        spdif_tx: spdif-tx {
-                               rockchip,pins = <2 RK_PC7 1 &pcfg_pull_none>;
+                               rockchip,pins = <2 RK_PC7 1 &pcfg_pull_none>;
                        };
                };
 
index 7b717ebec8ffa0f5565035e23ec1f8c709a3b916..3d1e126b553f93f4a93f33289ee7b0221a082183 100644 (file)
@@ -55,7 +55,7 @@
        };
 
        edp_panel: edp-panel {
-               compatible ="lg,lp079qx1-sp0v";
+               compatible = "lg,lp079qx1-sp0v";
                backlight = <&backlight>;
                enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
                power-supply = <&vcc3v3_s0>;
index 3ae5d727e36745425288311d14073aefe1117f25..04c752f49be98dfb7db9662b3acbfd8e1a83eedd 100644 (file)
@@ -49,7 +49,7 @@
        sgtl5000_clk: sgtl5000-oscillator  {
                        compatible = "fixed-clock";
                        #clock-cells = <0>;
-                       clock-frequency  = <24576000>;
+                       clock-frequency = <24576000>;
        };
 
        dc_12v: dc-12v {
index f6b2199a42bdac0c9e810affea66afa76a39ea92..13927e7d0724ebb7995ce75a8f8a685fcbd38c32 100644 (file)
@@ -88,7 +88,7 @@
        };
 
        edp_panel: edp-panel {
-               compatible ="lg,lp079qx1-sp0v";
+               compatible = "lg,lp079qx1-sp0v";
                backlight = <&backlight>;
                enable-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
                pinctrl-names = "default";
index 01d1a75c8b4d3b7b042816bfd386b0a0edd8a613..935b8c68a71d6c60db9c8d8b9070809c852d8b27 100644 (file)
 
        pcie {
                pcie_pwr: pcie-pwr {
-                       rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
+                       rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
                };
        };