drm/msm/dpu: drop now-unused mdss_irqs field from hw catalog
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Thu, 27 Jul 2023 14:45:42 +0000 (17:45 +0300)
committerDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Wed, 2 Aug 2023 09:36:33 +0000 (12:36 +0300)
Now as the list of the interrupts is constructed from the catalog
data, drop the mdss_irqs field from catalog.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/549659/
Link: https://lore.kernel.org/r/20230727144543.1483630-5-dmitry.baryshkov@linaro.org
17 files changed:
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h

index b5fbac55f127329bfa49ad79502152c6692b3666..92530aec3bdc6b025fdaa06600a29023fdef2143 100644 (file)
@@ -342,14 +342,6 @@ const struct dpu_mdss_cfg dpu_msm8998_cfg = {
        .vbif_count = ARRAY_SIZE(msm8998_vbif),
        .vbif = msm8998_vbif,
        .perf = &msm8998_perf_data,
-       .mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
-                    BIT(MDP_SSPP_TOP0_INTR2) | \
-                    BIT(MDP_SSPP_TOP0_HIST_INTR) | \
-                    BIT(MDP_INTF0_INTR) | \
-                    BIT(MDP_INTF1_INTR) | \
-                    BIT(MDP_INTF2_INTR) | \
-                    BIT(MDP_INTF3_INTR) | \
-                    BIT(MDP_INTF4_INTR),
 };
 
 #endif
index 8000b870d3a747a017524f9c5edd7930d751c78d..3034c1b6ed906c533767eb4c4c196bef1332c6ec 100644 (file)
@@ -359,15 +359,6 @@ const struct dpu_mdss_cfg dpu_sdm845_cfg = {
        .vbif_count = ARRAY_SIZE(sdm845_vbif),
        .vbif = sdm845_vbif,
        .perf = &sdm845_perf_data,
-       .mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
-                    BIT(MDP_SSPP_TOP0_INTR2) | \
-                    BIT(MDP_SSPP_TOP0_HIST_INTR) | \
-                    BIT(MDP_INTF0_INTR) | \
-                    BIT(MDP_INTF1_INTR) | \
-                    BIT(MDP_INTF2_INTR) | \
-                    BIT(MDP_INTF3_INTR) | \
-                    BIT(MDP_AD4_0_INTR) | \
-                    BIT(MDP_AD4_1_INTR),
 };
 
 #endif
index 7ce2d69d28f6686f4d42fb07bde574cd375d3f37..3745c150540e67ce2aa077ba4682f254dff553d0 100644 (file)
@@ -404,17 +404,6 @@ const struct dpu_mdss_cfg dpu_sm8150_cfg = {
        .vbif_count = ARRAY_SIZE(sdm845_vbif),
        .vbif = sdm845_vbif,
        .perf = &sm8150_perf_data,
-       .mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
-                    BIT(MDP_SSPP_TOP0_INTR2) | \
-                    BIT(MDP_SSPP_TOP0_HIST_INTR) | \
-                    BIT(MDP_INTF0_INTR) | \
-                    BIT(MDP_INTF1_INTR) | \
-                    BIT(MDP_INTF1_TEAR_INTR) | \
-                    BIT(MDP_INTF2_INTR) | \
-                    BIT(MDP_INTF2_TEAR_INTR) | \
-                    BIT(MDP_INTF3_INTR) | \
-                    BIT(MDP_AD4_0_INTR) | \
-                    BIT(MDP_AD4_1_INTR),
 };
 
 #endif
index cea005382456be2521a154ed90f02c824eb6975f..6291568bef0332d919a7bf8eb3544282949fd693 100644 (file)
@@ -431,19 +431,6 @@ const struct dpu_mdss_cfg dpu_sc8180x_cfg = {
        .vbif_count = ARRAY_SIZE(sdm845_vbif),
        .vbif = sdm845_vbif,
        .perf = &sc8180x_perf_data,
-       .mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
-                    BIT(MDP_SSPP_TOP0_INTR2) | \
-                    BIT(MDP_SSPP_TOP0_HIST_INTR) | \
-                    BIT(MDP_INTF0_INTR) | \
-                    BIT(MDP_INTF1_INTR) | \
-                    BIT(MDP_INTF1_TEAR_INTR) | \
-                    BIT(MDP_INTF2_INTR) | \
-                    BIT(MDP_INTF2_TEAR_INTR) | \
-                    BIT(MDP_INTF3_INTR) | \
-                    BIT(MDP_INTF4_INTR) | \
-                    BIT(MDP_INTF5_INTR) | \
-                    BIT(MDP_AD4_0_INTR) | \
-                    BIT(MDP_AD4_1_INTR),
 };
 
 #endif
index 5fddfcce62886e68a15edf237ee66afe88d1a72d..e922668aea1af57cb44662681d37a744e29f0a91 100644 (file)
@@ -225,12 +225,6 @@ const struct dpu_mdss_cfg dpu_sm6125_cfg = {
        .vbif_count = ARRAY_SIZE(sdm845_vbif),
        .vbif = sdm845_vbif,
        .perf = &sm6125_perf_data,
-       .mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
-                    BIT(MDP_SSPP_TOP0_INTR2) | \
-                    BIT(MDP_SSPP_TOP0_HIST_INTR) | \
-                    BIT(MDP_INTF0_INTR) | \
-                    BIT(MDP_INTF1_INTR) | \
-                    BIT(MDP_INTF1_TEAR_INTR),
 };
 
 #endif
index 893d1271fb71e63e3e10864ec90e27d4b0a0b8fa..9751b39ae371fad60e7589b3de195b9726b8c833 100644 (file)
@@ -421,16 +421,6 @@ const struct dpu_mdss_cfg dpu_sm8250_cfg = {
        .wb_count = ARRAY_SIZE(sm8250_wb),
        .wb = sm8250_wb,
        .perf = &sm8250_perf_data,
-       .mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
-                    BIT(MDP_SSPP_TOP0_INTR2) | \
-                    BIT(MDP_SSPP_TOP0_HIST_INTR) | \
-                    BIT(MDP_INTF0_INTR) | \
-                    BIT(MDP_INTF1_INTR) | \
-                    BIT(MDP_INTF1_TEAR_INTR) | \
-                    BIT(MDP_INTF2_INTR) | \
-                    BIT(MDP_INTF2_TEAR_INTR) | \
-                    BIT(MDP_INTF3_INTR) | \
-                    BIT(MDP_INTF4_INTR),
 };
 
 #endif
index 61118f648cbc6c2c30e679cb24491c0f13c5ca92..a9464b856f42e59db373cfa97df6945aa0258f2e 100644 (file)
@@ -231,12 +231,6 @@ const struct dpu_mdss_cfg dpu_sc7180_cfg = {
        .vbif_count = ARRAY_SIZE(sdm845_vbif),
        .vbif = sdm845_vbif,
        .perf = &sc7180_perf_data,
-       .mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
-                    BIT(MDP_SSPP_TOP0_INTR2) | \
-                    BIT(MDP_SSPP_TOP0_HIST_INTR) | \
-                    BIT(MDP_INTF0_INTR) | \
-                    BIT(MDP_INTF1_INTR) | \
-                    BIT(MDP_INTF1_TEAR_INTR),
 };
 
 #endif
index c0d7bb930e8aca15c7d7ed5d406c0548444b7c1c..ae7cd965c0b9f52979ec2f915a1ee29cbcd23392 100644 (file)
@@ -161,11 +161,6 @@ const struct dpu_mdss_cfg dpu_sm6115_cfg = {
        .vbif_count = ARRAY_SIZE(sdm845_vbif),
        .vbif = sdm845_vbif,
        .perf = &sm6115_perf_data,
-       .mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
-                    BIT(MDP_SSPP_TOP0_INTR2) | \
-                    BIT(MDP_SSPP_TOP0_HIST_INTR) | \
-                    BIT(MDP_INTF1_INTR) | \
-                    BIT(MDP_INTF1_TEAR_INTR),
 };
 
 #endif
index 11c50aa5034b24730b79fb33f690bc99e79edc74..a13305cad7cd1b6ea34402b5e96a2f3faf02fb6d 100644 (file)
@@ -234,12 +234,6 @@ const struct dpu_mdss_cfg dpu_sm6350_cfg = {
        .vbif_count = ARRAY_SIZE(sdm845_vbif),
        .vbif = sdm845_vbif,
        .perf = &sm6350_perf_data,
-       .mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
-                    BIT(MDP_SSPP_TOP0_INTR2) | \
-                    BIT(MDP_SSPP_TOP0_HIST_INTR) | \
-                    BIT(MDP_INTF0_INTR) | \
-                    BIT(MDP_INTF1_INTR) | \
-                    BIT(MDP_INTF1_TEAR_INTR),
 };
 
 #endif
index 2182939bc02659c55828511cf9b567f0585d4d58..bb297c3ef81a313b13642954af9cec50827f89d7 100644 (file)
@@ -151,11 +151,6 @@ const struct dpu_mdss_cfg dpu_qcm2290_cfg = {
        .vbif_count = ARRAY_SIZE(sdm845_vbif),
        .vbif = sdm845_vbif,
        .perf = &qcm2290_perf_data,
-       .mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
-                    BIT(MDP_SSPP_TOP0_INTR2) | \
-                    BIT(MDP_SSPP_TOP0_HIST_INTR) | \
-                    BIT(MDP_INTF1_INTR) | \
-                    BIT(MDP_INTF1_TEAR_INTR),
 };
 
 #endif
index f0c0aa90f82eeb8f5c9bf97b5057a41854f559a8..014a56e585b7685df3c4e7ee77a6f576bbafaa32 100644 (file)
@@ -173,11 +173,6 @@ const struct dpu_mdss_cfg dpu_sm6375_cfg = {
        .vbif_count = ARRAY_SIZE(sdm845_vbif),
        .vbif = sdm845_vbif,
        .perf = &sm6375_perf_data,
-       .mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
-                    BIT(MDP_SSPP_TOP0_INTR2) | \
-                    BIT(MDP_SSPP_TOP0_HIST_INTR) | \
-                    BIT(MDP_INTF1_INTR) | \
-                    BIT(MDP_INTF1_TEAR_INTR),
 };
 
 #endif
index 2460ced03610a952dc0a30b06b68ad2d6ad49191..90efde5e9da5ca6b251b7310de35b8425b74fe4f 100644 (file)
@@ -412,15 +412,6 @@ const struct dpu_mdss_cfg dpu_sm8350_cfg = {
        .vbif_count = ARRAY_SIZE(sdm845_vbif),
        .vbif = sdm845_vbif,
        .perf = &sm8350_perf_data,
-       .mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
-                    BIT(MDP_SSPP_TOP0_INTR2) | \
-                    BIT(MDP_SSPP_TOP0_HIST_INTR) | \
-                    BIT(MDP_INTF0_7xxx_INTR) | \
-                    BIT(MDP_INTF1_7xxx_INTR) | \
-                    BIT(MDP_INTF1_7xxx_TEAR_INTR) | \
-                    BIT(MDP_INTF2_7xxx_INTR) | \
-                    BIT(MDP_INTF2_7xxx_TEAR_INTR) | \
-                    BIT(MDP_INTF3_7xxx_INTR),
 };
 
 #endif
index a8dea8f27c41c43afe9c3d184e224283002dbc07..0a5dcec343fce242b71dfb09074e38dfa73dad94 100644 (file)
@@ -281,13 +281,6 @@ const struct dpu_mdss_cfg dpu_sc7280_cfg = {
        .vbif_count = ARRAY_SIZE(sdm845_vbif),
        .vbif = sdm845_vbif,
        .perf = &sc7280_perf_data,
-       .mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
-                    BIT(MDP_SSPP_TOP0_INTR2) | \
-                    BIT(MDP_SSPP_TOP0_HIST_INTR) | \
-                    BIT(MDP_INTF0_7xxx_INTR) | \
-                    BIT(MDP_INTF1_7xxx_INTR) | \
-                    BIT(MDP_INTF1_7xxx_TEAR_INTR) | \
-                    BIT(MDP_INTF5_7xxx_INTR),
 };
 
 #endif
index 397fe01125dda0889baa4dd12518e5171048ff86..7b1395f9e710b1068643987222fec3f753e14542 100644 (file)
@@ -474,20 +474,6 @@ const struct dpu_mdss_cfg dpu_sc8280xp_cfg = {
        .vbif_count = ARRAY_SIZE(sdm845_vbif),
        .vbif = sdm845_vbif,
        .perf = &sc8280xp_perf_data,
-       .mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
-                    BIT(MDP_SSPP_TOP0_INTR2) | \
-                    BIT(MDP_SSPP_TOP0_HIST_INTR) | \
-                    BIT(MDP_INTF0_7xxx_INTR) | \
-                    BIT(MDP_INTF1_7xxx_INTR) | \
-                    BIT(MDP_INTF1_7xxx_TEAR_INTR) | \
-                    BIT(MDP_INTF2_7xxx_INTR) | \
-                    BIT(MDP_INTF2_7xxx_TEAR_INTR) | \
-                    BIT(MDP_INTF3_7xxx_INTR) | \
-                    BIT(MDP_INTF4_7xxx_INTR) | \
-                    BIT(MDP_INTF5_7xxx_INTR) | \
-                    BIT(MDP_INTF6_7xxx_INTR) | \
-                    BIT(MDP_INTF7_7xxx_INTR) | \
-                    BIT(MDP_INTF8_7xxx_INTR),
 };
 
 #endif
index 90a8461911c8d85740f07e3e1d8464a59756b9de..4999f3d8f2e25fe29a8273eb121400d6286fc2ff 100644 (file)
@@ -435,15 +435,6 @@ const struct dpu_mdss_cfg dpu_sm8450_cfg = {
        .vbif_count = ARRAY_SIZE(sdm845_vbif),
        .vbif = sdm845_vbif,
        .perf = &sm8450_perf_data,
-       .mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
-                    BIT(MDP_SSPP_TOP0_INTR2) | \
-                    BIT(MDP_SSPP_TOP0_HIST_INTR) | \
-                    BIT(MDP_INTF0_7xxx_INTR) | \
-                    BIT(MDP_INTF1_7xxx_INTR) | \
-                    BIT(MDP_INTF1_7xxx_TEAR_INTR) | \
-                    BIT(MDP_INTF2_7xxx_INTR) | \
-                    BIT(MDP_INTF2_7xxx_TEAR_INTR) | \
-                    BIT(MDP_INTF3_7xxx_INTR),
 };
 
 #endif
index c9252528136da7b1d61260e0dabf21dc6f1dfbe7..401c6c2da367fefaf0b3df8d618b87d18a8a6628 100644 (file)
@@ -449,15 +449,6 @@ const struct dpu_mdss_cfg dpu_sm8550_cfg = {
        .vbif_count = ARRAY_SIZE(sdm845_vbif),
        .vbif = sdm845_vbif,
        .perf = &sm8550_perf_data,
-       .mdss_irqs = BIT(MDP_SSPP_TOP0_INTR) | \
-                    BIT(MDP_SSPP_TOP0_INTR2) | \
-                    BIT(MDP_SSPP_TOP0_HIST_INTR) | \
-                    BIT(MDP_INTF0_7xxx_INTR) | \
-                    BIT(MDP_INTF1_7xxx_INTR) | \
-                    BIT(MDP_INTF1_7xxx_TEAR_INTR) | \
-                    BIT(MDP_INTF2_7xxx_INTR) | \
-                    BIT(MDP_INTF2_7xxx_TEAR_INTR) | \
-                    BIT(MDP_INTF3_7xxx_INTR),
 };
 
 #endif
index acfe43f4918c67b64521e03be63ac13875128cdb..c72ed0e35dcee34b128e8f13045b18378bae70db 100644 (file)
@@ -811,7 +811,6 @@ struct dpu_perf_cfg {
  * @dma_formats        Supported formats for dma pipe
  * @cursor_formats     Supported formats for cursor pipe
  * @vig_formats        Supported formats for vig pipe
- * @mdss_irqs:         Bitmap with the irqs supported by the target
  */
 struct dpu_mdss_cfg {
        const struct dpu_mdss_version *mdss_ver;
@@ -860,8 +859,6 @@ struct dpu_mdss_cfg {
        const struct dpu_format_extended *dma_formats;
        const struct dpu_format_extended *cursor_formats;
        const struct dpu_format_extended *vig_formats;
-
-       unsigned long mdss_irqs;
 };
 
 extern const struct dpu_mdss_cfg dpu_msm8998_cfg;