drm/i915: Move i915_power_well_id out of i915_reg.h

It has nothing to do with registers, so move it to the more appropriate
intel_display_power.h

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190816012343.36433-2-daniele.ceraolospurio@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 374b75602141dafbd2e6500a6b6e6e10be184908..1caae2f612162bbc861dd99d0e7f0b32b1df2293 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -13,6 +13,7 @@
 #include "intel_cdclk.h"
 #include "intel_combo_phy.h"
 #include "intel_csr.h"
+#include "intel_display_power.h"
 #include "intel_display_types.h"
 #include "intel_dpio_phy.h"
 #include "intel_hotplug.h"

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
index 97f2562fc5d3b26f28d7b179fcd48b7dddf4548d..a50605b8b1ad6468e5e32e675014ee4f2c0e8fb2 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_power.h
+++ b/drivers/gpu/drm/i915/display/intel_display_power.h
@@ -92,6 +92,27 @@ enum intel_display_power_domain {
        POWER_DOMAIN_NUM,
 };
 
+/*
+ * i915_power_well_id:
+ *
+ * IDs used to look up power wells. Power wells accessed directly bypassing
+ * the power domains framework must be assigned a unique ID. The rest of power
+ * wells must be assigned DISP_PW_ID_NONE.
+ */
+enum i915_power_well_id {
+       DISP_PW_ID_NONE,
+
+       VLV_DISP_PW_DISP2D,
+       BXT_DISP_PW_DPIO_CMN_A,
+       VLV_DISP_PW_DPIO_CMN_BC,
+       GLK_DISP_PW_DPIO_CMN_C,
+       CHV_DISP_PW_DPIO_CMN_D,
+       HSW_DISP_PW_GLOBAL,
+       SKL_DISP_PW_MISC_IO,
+       SKL_DISP_PW_1,
+       SKL_DISP_PW_2,
+};
+
 #define POWER_DOMAIN_PIPE(pipe) ((pipe) + POWER_DOMAIN_PIPE_A)
 #define POWER_DOMAIN_PIPE_PANEL_FITTER(pipe) \
                ((pipe) + POWER_DOMAIN_PIPE_A_PANEL_FITTER)

diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index b83a0b71766ce168491729a855f35f613fdfcb26..07aa571c6c3dcd39765b51cb9c1df070770b7717 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -14,6 +14,7 @@
 #include <drm/i915_component.h>
 
 #include "i915_reg.h"
+#include "intel_display_power.h"
 #include "intel_display_types.h"
 #include "intel_hdcp.h"
 #include "intel_sideband.h"

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 2b7ccebf6550ccf99f41904432da67ab50aeba63..14165d619175252eec8e7861c1d8bdb018478cc2 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1163,27 +1163,6 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
 #define PUNIT_REG_ISPSSPM0                     0x39
 #define PUNIT_REG_ISPSSPM1                     0x3a
 
-/*
- * i915_power_well_id:
- *
- * IDs used to look up power wells. Power wells accessed directly bypassing
- * the power domains framework must be assigned a unique ID. The rest of power
- * wells must be assigned DISP_PW_ID_NONE.
- */
-enum i915_power_well_id {
-       DISP_PW_ID_NONE,
-
-       VLV_DISP_PW_DISP2D,
-       BXT_DISP_PW_DPIO_CMN_A,
-       VLV_DISP_PW_DPIO_CMN_BC,
-       GLK_DISP_PW_DPIO_CMN_C,
-       CHV_DISP_PW_DPIO_CMN_D,
-       HSW_DISP_PW_GLOBAL,
-       SKL_DISP_PW_MISC_IO,
-       SKL_DISP_PW_1,
-       SKL_DISP_PW_2,
-};
-
 #define PUNIT_REG_PWRGT_CTRL                   0x60
 #define PUNIT_REG_PWRGT_STATUS                 0x61
 #define   PUNIT_PWRGT_MASK(pw_idx)             (3 << ((pw_idx) * 2))