u16 AGCTAB_ArrayLen, PHY_REGArrayLen = 0;
struct r8192_priv *priv = rtllib_priv(dev);
- AGCTAB_ArrayLen = AGCTAB_ArrayLength;
+ AGCTAB_ArrayLen = RTL8192E_AGCTAB_ARR_LEN;
Rtl819XAGCTAB_Array_Table = Rtl819XAGCTAB_Array;
if (priv->rf_type == RF_1T2R) {
PHY_REGArrayLen = PHY_REG_1T2RArrayLength;
#define MAX_DOZE_WAITING_TIMES_9x 64
-#define AGCTAB_ArrayLength AGCTAB_ArrayLengthPciE
#define MACPHY_ArrayLength MACPHY_ArrayLengthPciE
#define RadioA_ArrayLength RadioA_ArrayLengthPciE
#define RadioB_ArrayLength RadioB_ArrayLengthPciE
0x318, 0x00000fff, 0x00000800,
};
-u32 Rtl8192PciEAGCTAB_Array[AGCTAB_ArrayLengthPciE] = {
+u32 Rtl8192PciEAGCTAB_Array[RTL8192E_AGCTAB_ARR_LEN] = {
0xc78, 0x7d000001,
0xc78, 0x7d010001,
0xc78, 0x7d020001,
extern u32 Rtl8192PciEMACPHY_Array[MACPHY_ArrayLengthPciE];
#define MACPHY_Array_PGLengthPciE 30
extern u32 Rtl8192PciEMACPHY_Array_PG[MACPHY_Array_PGLengthPciE];
-#define AGCTAB_ArrayLengthPciE 384
-extern u32 Rtl8192PciEAGCTAB_Array[AGCTAB_ArrayLengthPciE];
+#define RTL8192E_AGCTAB_ARR_LEN 384
+extern u32 Rtl8192PciEAGCTAB_Array[RTL8192E_AGCTAB_ARR_LEN];
#endif