drm/i915/dg2: Recognize pre-production hardware

The first production SoC steppings for DG2 were C0 (for G10), B1 (for
G11), and A1 (for G12).  This corresponds to PCI revision IDs 0x8, 0x5,
and 0x1 respectively.  Add this information to the driver's
pre-production detection.

Bspec: 44477
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230816214201.534095-8-matthew.d.roper@intel.com

diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index ec4d26b3c17cc15c827822404ad1ed3d128e22e6..f8dbee7a5af7fd74ac4d299ea76de6106fcb218b 100644 (file)
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -183,6 +183,9 @@ static void intel_detect_preproduction_hw(struct drm_i915_private *dev_priv)
        pre |= IS_ICELAKE(dev_priv) && INTEL_REVID(dev_priv) < 0x7;
        pre |= IS_TIGERLAKE(dev_priv) && INTEL_REVID(dev_priv) < 0x1;
        pre |= IS_DG1(dev_priv) && INTEL_REVID(dev_priv) < 0x1;
+       pre |= IS_DG2_G10(dev_priv) && INTEL_REVID(dev_priv) < 0x8;
+       pre |= IS_DG2_G11(dev_priv) && INTEL_REVID(dev_priv) < 0x5;
+       pre |= IS_DG2_G12(dev_priv) && INTEL_REVID(dev_priv) < 0x1;
 
        if (pre) {
                drm_err(&dev_priv->drm, "This is a pre-production stepping. "