i2c: eg20t: Use i2c_10bit_addr_*_from_msg() helpers
authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Thu, 13 Feb 2025 14:07:19 +0000 (16:07 +0200)
committerAndi Shyti <andi.shyti@kernel.org>
Tue, 18 Mar 2025 20:53:54 +0000 (21:53 +0100)
Use i2c_10bit_addr_*_from_msg() helpers instead of local copy.
No functional change intended.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20250213141045.2716943-6-andriy.shevchenko@linux.intel.com
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
drivers/i2c/busses/i2c-eg20t.c

index 4914bfbee2a97736d61eab913650fa4aea7f163c..efdaddf99f9ec325784f7009ab651164c9066b57 100644 (file)
@@ -48,8 +48,6 @@
 
 #define BUS_IDLE_TIMEOUT       20
 #define PCH_I2CCTL_I2CMEN      0x0080
-#define TEN_BIT_ADDR_DEFAULT   0xF000
-#define TEN_BIT_ADDR_MASK      0xF0
 #define PCH_START              0x0020
 #define PCH_RESTART            0x0004
 #define PCH_ESR_START          0x0001
@@ -58,7 +56,6 @@
 #define PCH_ACK                        0x0008
 #define PCH_GETACK             0x0001
 #define CLR_REG                        0x0
-#define I2C_RD                 0x1
 #define I2CMCF_BIT             0x0080
 #define I2CMIF_BIT             0x0002
 #define I2CMAL_BIT             0x0010
@@ -76,8 +73,6 @@
 #define I2CMBB_BIT             0x0020
 #define BUFFER_MODE_MASK       (I2CBMFI_BIT | I2CBMAL_BIT | I2CBMNA_BIT | \
                                I2CBMTO_BIT | I2CBMIS_BIT)
-#define I2C_ADDR_MSK           0xFF
-#define I2C_MSB_2B_MSK         0x300
 #define FAST_MODE_CLK          400
 #define FAST_MODE_EN           0x0001
 #define SUB_ADDR_LEN_MAX       4
@@ -371,16 +366,12 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap,
        struct i2c_algo_pch_data *adap = i2c_adap->algo_data;
        u8 *buf;
        u32 length;
-       u32 addr;
-       u32 addr_2_msb;
-       u32 addr_8_lsb;
        s32 wrcount;
        s32 rtn;
        void __iomem *p = adap->pch_base_address;
 
        length = msgs->len;
        buf = msgs->buf;
-       addr = msgs->addr;
 
        /* enable master tx */
        pch_setbit(adap->pch_base_address, PCH_I2CCTL, I2C_TX_MODE);
@@ -394,8 +385,7 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap,
        }
 
        if (msgs->flags & I2C_M_TEN) {
-               addr_2_msb = ((addr & I2C_MSB_2B_MSK) >> 7) & 0x06;
-               iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR);
+               iowrite32(i2c_10bit_addr_hi_from_msg(msgs), p + PCH_I2CDR);
                if (first)
                        pch_i2c_start(adap);
 
@@ -403,8 +393,7 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap,
                if (rtn)
                        return rtn;
 
-               addr_8_lsb = (addr & I2C_ADDR_MSK);
-               iowrite32(addr_8_lsb, p + PCH_I2CDR);
+               iowrite32(i2c_10bit_addr_lo_from_msg(msgs), p + PCH_I2CDR);
        } else {
                /* set 7 bit slave address and R/W bit as 0 */
                iowrite32(i2c_8bit_addr_from_msg(msgs), p + PCH_I2CDR);
@@ -490,15 +479,11 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs,
        u8 *buf;
        u32 count;
        u32 length;
-       u32 addr;
-       u32 addr_2_msb;
-       u32 addr_8_lsb;
        void __iomem *p = adap->pch_base_address;
        s32 rtn;
 
        length = msgs->len;
        buf = msgs->buf;
-       addr = msgs->addr;
 
        /* enable master reception */
        pch_clrbit(adap->pch_base_address, PCH_I2CCTL, I2C_TX_MODE);
@@ -509,8 +494,7 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs,
        }
 
        if (msgs->flags & I2C_M_TEN) {
-               addr_2_msb = ((addr & I2C_MSB_2B_MSK) >> 7);
-               iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR);
+               iowrite32(i2c_10bit_addr_hi_from_msg(msgs) & ~I2C_M_RD, p + PCH_I2CDR);
                if (first)
                        pch_i2c_start(adap);
 
@@ -518,8 +502,7 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs,
                if (rtn)
                        return rtn;
 
-               addr_8_lsb = (addr & I2C_ADDR_MSK);
-               iowrite32(addr_8_lsb, p + PCH_I2CDR);
+               iowrite32(i2c_10bit_addr_lo_from_msg(msgs), p + PCH_I2CDR);
 
                pch_i2c_restart(adap);
 
@@ -527,8 +510,7 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs,
                if (rtn)
                        return rtn;
 
-               addr_2_msb |= I2C_RD;
-               iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR);
+               iowrite32(i2c_10bit_addr_hi_from_msg(msgs), p + PCH_I2CDR);
        } else {
                /* 7 address bits + R/W bit */
                iowrite32(i2c_8bit_addr_from_msg(msgs), p + PCH_I2CDR);