ice: Implement functions for reading and setting GPIO pins
authorMaciej Machnikowski <maciej.machnikowski@intel.com>
Tue, 17 Aug 2021 11:09:16 +0000 (13:09 +0200)
committerTony Nguyen <anthony.l.nguyen@intel.com>
Thu, 14 Oct 2021 14:37:30 +0000 (07:37 -0700)
Implement ice_aq_get_gpio and ice_aq_set_gpio for reading and changing
the state of GPIO pins described in the topology.

Signed-off-by: Maciej Machnikowski <maciej.machnikowski@intel.com>
Tested-by: Sunitha Mekala <sunithax.d.mekala@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
drivers/net/ethernet/intel/ice/ice_adminq_cmd.h
drivers/net/ethernet/intel/ice/ice_common.c
drivers/net/ethernet/intel/ice/ice_common.h

index 9f6edfa597701ef902d47dff809cb2a6c0d4fe13..25708c320f5d4bd706f8a810da941f55dd8b201e 100644 (file)
@@ -1344,6 +1344,16 @@ struct ice_aqc_set_port_id_led {
        u8 rsvd[13];
 };
 
+/* Set/Get GPIO (direct, 0x06EC/0x06ED) */
+struct ice_aqc_gpio {
+       __le16 gpio_ctrl_handle;
+#define ICE_AQC_GPIO_HANDLE_S  0
+#define ICE_AQC_GPIO_HANDLE_M  (0x3FF << ICE_AQC_GPIO_HANDLE_S)
+       u8 gpio_num;
+       u8 gpio_val;
+       u8 rsvd[12];
+};
+
 /* Read/Write SFF EEPROM command (indirect 0x06EE) */
 struct ice_aqc_sff_eeprom {
        u8 lport_num;
@@ -1985,6 +1995,7 @@ struct ice_aq_desc {
                struct ice_aqc_get_phy_caps get_phy;
                struct ice_aqc_set_phy_cfg set_phy;
                struct ice_aqc_restart_an restart_an;
+               struct ice_aqc_gpio read_write_gpio;
                struct ice_aqc_sff_eeprom read_write_sff_param;
                struct ice_aqc_set_port_id_led set_port_id_led;
                struct ice_aqc_get_sw_cfg get_sw_conf;
@@ -2140,6 +2151,8 @@ enum ice_adminq_opc {
        ice_aqc_opc_set_mac_lb                          = 0x0620,
        ice_aqc_opc_get_link_topo                       = 0x06E0,
        ice_aqc_opc_set_port_id_led                     = 0x06E9,
+       ice_aqc_opc_set_gpio                            = 0x06EC,
+       ice_aqc_opc_get_gpio                            = 0x06ED,
        ice_aqc_opc_sff_eeprom                          = 0x06EE,
 
        /* NVM commands */
index b0084359a7e11687b21b9a88192cd1c8323463b6..7416f802a558a02a166397651e15ac2c0868b9e5 100644 (file)
@@ -4794,6 +4794,64 @@ ice_aq_get_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,
        return 0;
 }
 
+/**
+ * ice_aq_set_gpio
+ * @hw: pointer to the hw struct
+ * @gpio_ctrl_handle: GPIO controller node handle
+ * @pin_idx: IO Number of the GPIO that needs to be set
+ * @value: SW provide IO value to set in the LSB
+ * @cd: pointer to command details structure or NULL
+ *
+ * Sends 0x06EC AQ command to set the GPIO pin state that's part of the topology
+ */
+int
+ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value,
+               struct ice_sq_cd *cd)
+{
+       struct ice_aqc_gpio *cmd;
+       struct ice_aq_desc desc;
+
+       ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_gpio);
+       cmd = &desc.params.read_write_gpio;
+       cmd->gpio_ctrl_handle = cpu_to_le16(gpio_ctrl_handle);
+       cmd->gpio_num = pin_idx;
+       cmd->gpio_val = value ? 1 : 0;
+
+       return ice_status_to_errno(ice_aq_send_cmd(hw, &desc, NULL, 0, cd));
+}
+
+/**
+ * ice_aq_get_gpio
+ * @hw: pointer to the hw struct
+ * @gpio_ctrl_handle: GPIO controller node handle
+ * @pin_idx: IO Number of the GPIO that needs to be set
+ * @value: IO value read
+ * @cd: pointer to command details structure or NULL
+ *
+ * Sends 0x06ED AQ command to get the value of a GPIO signal which is part of
+ * the topology
+ */
+int
+ice_aq_get_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,
+               bool *value, struct ice_sq_cd *cd)
+{
+       struct ice_aqc_gpio *cmd;
+       struct ice_aq_desc desc;
+       enum ice_status status;
+
+       ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_gpio);
+       cmd = &desc.params.read_write_gpio;
+       cmd->gpio_ctrl_handle = cpu_to_le16(gpio_ctrl_handle);
+       cmd->gpio_num = pin_idx;
+
+       status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
+       if (status)
+               return ice_status_to_errno(status);
+
+       *value = !!cmd->gpio_val;
+       return 0;
+}
+
 /**
  * ice_fw_supports_link_override
  * @hw: pointer to the hardware structure
index fb16070f02e242534c6b5dc0023ff258d7c37612..4273f8921e53752a207cc929d8d6c8da0c29507b 100644 (file)
@@ -192,6 +192,12 @@ ice_aq_set_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,
 int
 ice_aq_get_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,
                        u32 *value, struct ice_sq_cd *cd);
+int
+ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value,
+               struct ice_sq_cd *cd);
+int
+ice_aq_get_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,
+               bool *value, struct ice_sq_cd *cd);
 enum ice_status
 ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
                    struct ice_sq_cd *cd);