[PATCH] intelfb: extend partial support of i915G to include i915GM
authorScott MacKenzie <irrational@poboxes.com>
Mon, 7 Nov 2005 09:00:33 +0000 (01:00 -0800)
committerLinus Torvalds <torvalds@g5.osdl.org>
Mon, 7 Nov 2005 15:53:49 +0000 (07:53 -0800)
Add partial support for GMA900 within the i915GM chipset.

Signed-off-by: Scott MacKenzie <irrational@poboxes.com>
Cc: "Antonino A. Daplas" <adaplas@pol.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
drivers/video/intelfb/intelfb.h
drivers/video/intelfb/intelfbdrv.c
drivers/video/intelfb/intelfbhw.c

index 011e11626558399a98890554878a3c4f6af4fa6c..f077ca34fabad6ed156a256d76908d5bc24a687b 100644 (file)
@@ -10,7 +10,7 @@
 /*** Version/name ***/
 #define INTELFB_VERSION                        "0.9.2"
 #define INTELFB_MODULE_NAME            "intelfb"
-#define SUPPORTED_CHIPSETS             "830M/845G/852GM/855GM/865G/915G"
+#define SUPPORTED_CHIPSETS             "830M/845G/852GM/855GM/865G/915G/915GM"
 
 
 /*** Debug/feature defines ***/
@@ -47,6 +47,7 @@
 #define PCI_DEVICE_ID_INTEL_85XGM      0x3582
 #define PCI_DEVICE_ID_INTEL_865G       0x2572
 #define PCI_DEVICE_ID_INTEL_915G       0x2582
+#define PCI_DEVICE_ID_INTEL_915GM      0x2592
 
 /* Size of MMIO region */
 #define INTEL_REG_SIZE                 0x80000
@@ -119,7 +120,8 @@ enum intel_chips {
        INTEL_855GM,
        INTEL_855GME,
        INTEL_865G,
-       INTEL_915G
+       INTEL_915G,
+       INTEL_915GM
 };
 
 struct intelfb_hwstate {
index 80a09344f1aaedffd1e6e665dd26186fe70e84b4..e6d75b926dc8e19244ecdea897ddd1d6d49575f1 100644 (file)
@@ -1,7 +1,7 @@
 /*
  * intelfb
  *
- * Linux framebuffer driver for Intel(R) 830M/845G/852GM/855GM/865G/915G
+ * Linux framebuffer driver for Intel(R) 830M/845G/852GM/855GM/865G/915G/915GM
  * integrated graphics chips.
  *
  * Copyright © 2002, 2003 David Dawes <dawes@xfree86.org>
@@ -186,6 +186,7 @@ static struct pci_device_id intelfb_pci_table[] __devinitdata = {
        { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_85XGM, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_85XGM },
        { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_865G, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_865G },
        { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_915G, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_915G },
+       { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_915GM, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_915GM },
        { 0, }
 };
 
@@ -549,10 +550,11 @@ intelfb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent)
        }
 
        /* Set base addresses. */
-       if (ent->device == PCI_DEVICE_ID_INTEL_915G) {
+       if ((ent->device == PCI_DEVICE_ID_INTEL_915G) ||
+                       (ent->device == PCI_DEVICE_ID_INTEL_915GM)) {
                aperture_bar = 2;
                mmio_bar = 0;
-               /* Disable HW cursor on 915G (not implemented yet) */
+               /* Disable HW cursor on 915G/M (not implemented yet) */
                hwcursor = 0;
        }
        dinfo->aperture.physical = pci_resource_start(pdev, aperture_bar);
index 5bafc3c54db767a41730105f18df9f104d8ad694..ac94c2e5ff857720161b9e7291fe10ecb54f2721 100644 (file)
@@ -99,6 +99,11 @@ intelfbhw_get_chipset(struct pci_dev *pdev, const char **name, int *chipset,
                *chipset = INTEL_915G;
                *mobile = 0;
                return 0;
+       case PCI_DEVICE_ID_INTEL_915GM:
+               *name = "Intel(R) 915GM";
+               *chipset = INTEL_915GM;
+               *mobile = 1;
+               return 0;
        default:
                return 1;
        }