drm/amdgpu: share struct amdgpu_pm_state_type with powerplay module
authorRex Zhu <Rex.Zhu@amd.com>
Tue, 25 Aug 2015 07:57:43 +0000 (15:57 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 21 Dec 2015 21:42:04 +0000 (16:42 -0500)
rename amdgpu_pm_state_type to amd_pm_state_type

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu.h
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
drivers/gpu/drm/amd/include/amd_shared.h

index d4e9272b60e893b9819a738524b4c76dfd191f71..d454ad6ff798b0ebaed4b3d503a23f94d259c4b7 100644 (file)
@@ -1299,31 +1299,7 @@ struct amdgpu_wb {
 int amdgpu_wb_get(struct amdgpu_device *adev, u32 *wb);
 void amdgpu_wb_free(struct amdgpu_device *adev, u32 wb);
 
-/**
- * struct amdgpu_pm - power management datas
- * It keeps track of various data needed to take powermanagement decision.
- */
 
-enum amdgpu_pm_state_type {
-       /* not used for dpm */
-       POWER_STATE_TYPE_DEFAULT,
-       POWER_STATE_TYPE_POWERSAVE,
-       /* user selectable states */
-       POWER_STATE_TYPE_BATTERY,
-       POWER_STATE_TYPE_BALANCED,
-       POWER_STATE_TYPE_PERFORMANCE,
-       /* internal states */
-       POWER_STATE_TYPE_INTERNAL_UVD,
-       POWER_STATE_TYPE_INTERNAL_UVD_SD,
-       POWER_STATE_TYPE_INTERNAL_UVD_HD,
-       POWER_STATE_TYPE_INTERNAL_UVD_HD2,
-       POWER_STATE_TYPE_INTERNAL_UVD_MVC,
-       POWER_STATE_TYPE_INTERNAL_BOOT,
-       POWER_STATE_TYPE_INTERNAL_THERMAL,
-       POWER_STATE_TYPE_INTERNAL_ACPI,
-       POWER_STATE_TYPE_INTERNAL_ULV,
-       POWER_STATE_TYPE_INTERNAL_3DPERF,
-};
 
 enum amdgpu_int_thermal_type {
        THERMAL_TYPE_NONE,
@@ -1605,8 +1581,8 @@ struct amdgpu_dpm {
        /* vce requirements */
        struct amdgpu_vce_state vce_states[AMDGPU_MAX_VCE_LEVELS];
        enum amdgpu_vce_level vce_level;
-       enum amdgpu_pm_state_type state;
-       enum amdgpu_pm_state_type user_state;
+       enum amd_pm_state_type state;
+       enum amd_pm_state_type user_state;
        u32                     platform_caps;
        u32                     voltage_response_time;
        u32                     backbias_response_time;
index 22a8c7d3a3ab03e9dc3fb294c1f0eb818a6a4880..eea1933947ae563d2b64d00d9f731f0ecee2e016 100644 (file)
@@ -52,7 +52,7 @@ static ssize_t amdgpu_get_dpm_state(struct device *dev,
 {
        struct drm_device *ddev = dev_get_drvdata(dev);
        struct amdgpu_device *adev = ddev->dev_private;
-       enum amdgpu_pm_state_type pm = adev->pm.dpm.user_state;
+       enum amd_pm_state_type pm = adev->pm.dpm.user_state;
 
        return snprintf(buf, PAGE_SIZE, "%s\n",
                        (pm == POWER_STATE_TYPE_BATTERY) ? "battery" :
@@ -351,7 +351,7 @@ void amdgpu_dpm_thermal_work_handler(struct work_struct *work)
                container_of(work, struct amdgpu_device,
                             pm.dpm.thermal.work);
        /* switch to the thermal state */
-       enum amdgpu_pm_state_type dpm_state = POWER_STATE_TYPE_INTERNAL_THERMAL;
+       enum amd_pm_state_type dpm_state = POWER_STATE_TYPE_INTERNAL_THERMAL;
 
        if (!adev->pm.dpm_enabled)
                return;
@@ -379,7 +379,7 @@ void amdgpu_dpm_thermal_work_handler(struct work_struct *work)
 }
 
 static struct amdgpu_ps *amdgpu_dpm_pick_power_state(struct amdgpu_device *adev,
-                                                    enum amdgpu_pm_state_type dpm_state)
+                                                    enum amd_pm_state_type dpm_state)
 {
        int i;
        struct amdgpu_ps *ps;
@@ -516,7 +516,7 @@ static void amdgpu_dpm_change_power_state_locked(struct amdgpu_device *adev)
 {
        int i;
        struct amdgpu_ps *ps;
-       enum amdgpu_pm_state_type dpm_state;
+       enum amd_pm_state_type dpm_state;
        int ret;
 
        /* if dpm init failed */
index fe28fb353fab215dd7e3c8d1297ee84060730439..1195d06f55bc491930f434684324a6618f22d087 100644 (file)
@@ -85,6 +85,27 @@ enum amd_powergating_state {
        AMD_PG_STATE_UNGATE,
 };
 
+enum amd_pm_state_type {
+       /* not used for dpm */
+       POWER_STATE_TYPE_DEFAULT,
+       POWER_STATE_TYPE_POWERSAVE,
+       /* user selectable states */
+       POWER_STATE_TYPE_BATTERY,
+       POWER_STATE_TYPE_BALANCED,
+       POWER_STATE_TYPE_PERFORMANCE,
+       /* internal states */
+       POWER_STATE_TYPE_INTERNAL_UVD,
+       POWER_STATE_TYPE_INTERNAL_UVD_SD,
+       POWER_STATE_TYPE_INTERNAL_UVD_HD,
+       POWER_STATE_TYPE_INTERNAL_UVD_HD2,
+       POWER_STATE_TYPE_INTERNAL_UVD_MVC,
+       POWER_STATE_TYPE_INTERNAL_BOOT,
+       POWER_STATE_TYPE_INTERNAL_THERMAL,
+       POWER_STATE_TYPE_INTERNAL_ACPI,
+       POWER_STATE_TYPE_INTERNAL_ULV,
+       POWER_STATE_TYPE_INTERNAL_3DPERF,
+};
+
 struct amd_ip_funcs {
        /* sets up early driver state (pre sw_init), does not configure hw - Optional */
        int (*early_init)(void *handle);