drm/amdgpu: fix the overflowed constant warning for RREG32_SOC15()
authorBob Zhou <bob.zhou@amd.com>
Tue, 4 Jun 2024 07:08:29 +0000 (15:08 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 14 Jun 2024 20:15:59 +0000 (16:15 -0400)
To fix potential overflowed constant warning reported by Coverity,
modify the variables to uint32_t.

Signed-off-by: Bob Zhou <bob.zhou@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/imu_v12_0.c

index 0c8ef908d112847ffde5cafabc13906190093f3c..6ff9cf27059a9b356cfa1d2b84af7c7d828dbd2b 100644 (file)
@@ -119,7 +119,8 @@ static int imu_v12_0_load_microcode(struct amdgpu_device *adev)
 
 static int imu_v12_0_wait_for_reset_status(struct amdgpu_device *adev)
 {
-       int i, imu_reg_val = 0;
+       u32 imu_reg_val = 0;
+       int i;
 
        for (i = 0; i < adev->usec_timeout; i++) {
                imu_reg_val = RREG32_SOC15(GC, 0, regGFX_IMU_GFX_RESET_CTRL);
@@ -138,7 +139,7 @@ static int imu_v12_0_wait_for_reset_status(struct amdgpu_device *adev)
 
 static void imu_v12_0_setup(struct amdgpu_device *adev)
 {
-       int imu_reg_val;
+       u32 imu_reg_val;
 
        WREG32_SOC15(GC, 0, regGFX_IMU_C2PMSG_ACCESS_CTRL0, 0xffffff);
        WREG32_SOC15(GC, 0, regGFX_IMU_C2PMSG_ACCESS_CTRL1, 0xffff);
@@ -157,7 +158,7 @@ static void imu_v12_0_setup(struct amdgpu_device *adev)
 
 static int imu_v12_0_start(struct amdgpu_device *adev)
 {
-       int imu_reg_val;
+       u32 imu_reg_val;
 
        imu_reg_val = RREG32_SOC15(GC, 0, regGFX_IMU_CORE_CTRL);
        imu_reg_val &= 0xfffffffe;