MIPS: RB532: Move dev3 init code to devices.c
authorPhil Sutter <n0-1@freewrt.org>
Mon, 19 Jan 2009 22:42:52 +0000 (23:42 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Fri, 30 Jan 2009 21:33:00 +0000 (21:33 +0000)
This code doesn't belong to gpio.c, as it's completely unrelated to
GPIO. As dev1 and dev2 init code is in devices.c, it seems to be a more
adequate place.

Signed-off-by: Phil Sutter <n0-1@freewrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/rb532/devices.c
arch/mips/rb532/gpio.c

index 3c74561b4ee5526795b8128d1096f9428f3553a1..1a0209eca789a84cf18af331233f7d16010a3273 100644 (file)
 
 extern unsigned int idt_cpu_freq;
 
+static struct mpmc_device dev3;
+
+void set_latch_u5(unsigned char or_mask, unsigned char nand_mask)
+{
+       unsigned long flags;
+
+       spin_lock_irqsave(&dev3.lock, flags);
+
+       dev3.state = (dev3.state | or_mask) & ~nand_mask;
+       writeb(dev3.state, dev3.base);
+
+       spin_unlock_irqrestore(&dev3.lock, flags);
+}
+EXPORT_SYMBOL(set_latch_u5);
+
+unsigned char get_latch_u5(void)
+{
+       return dev3.state;
+}
+EXPORT_SYMBOL(get_latch_u5);
+
+static struct resource rb532_dev3_ctl_res[] = {
+       {
+               .name   = "dev3_ctl",
+               .flags  = IORESOURCE_MEM,
+       }
+};
+
 static struct resource korina_dev0_res[] = {
        {
                .name = "korina_regs",
@@ -314,6 +342,17 @@ static int __init plat_setup_devices(void)
        nand_slot0_res[0].start = readl(IDT434_REG_BASE + DEV2BASE);
        nand_slot0_res[0].end = nand_slot0_res[0].start + 0x1000;
 
+       /* Read the third (multi purpose) resources from the DC */
+       rb532_dev3_ctl_res[0].start = readl(IDT434_REG_BASE + DEV3BASE);
+       rb532_dev3_ctl_res[0].end = rb532_dev3_ctl_res[0].start + 0x1000;
+
+       dev3.base = ioremap_nocache(rb532_dev3_ctl_res[0].start, 0x1000);
+
+       if (!dev3.base) {
+               printk(KERN_ERR "rb532: cannot remap device controller 3\n");
+               return -ENXIO;
+       }
+
        /* Initialise the NAND device */
        rb532_nand_setup();
 
index be977a4c2f9c416db07fe571ee658fa090d6608b..6229173946ada7fbb3b783e0a4344e5e9b47f1fc 100644 (file)
@@ -41,8 +41,6 @@ struct rb532_gpio_chip {
        void __iomem     *regbase;
 };
 
-struct mpmc_device dev3;
-
 static struct resource rb532_gpio_reg0_res[] = {
        {
                .name   = "gpio_reg0",
@@ -52,13 +50,6 @@ static struct resource rb532_gpio_reg0_res[] = {
        }
 };
 
-static struct resource rb532_dev3_ctl_res[] = {
-       {
-               .name   = "dev3_ctl",
-               .flags  = IORESOURCE_MEM,
-       }
-};
-
 void set_434_reg(unsigned reg_offs, unsigned bit, unsigned len, unsigned val)
 {
        unsigned long flags;
@@ -86,25 +77,6 @@ unsigned get_434_reg(unsigned reg_offs)
 }
 EXPORT_SYMBOL(get_434_reg);
 
-void set_latch_u5(unsigned char or_mask, unsigned char nand_mask)
-{
-       unsigned long flags;
-
-       spin_lock_irqsave(&dev3.lock, flags);
-
-       dev3.state = (dev3.state | or_mask) & ~nand_mask;
-       writeb(dev3.state, dev3.base);
-
-       spin_unlock_irqrestore(&dev3.lock, flags);
-}
-EXPORT_SYMBOL(set_latch_u5);
-
-unsigned char get_latch_u5(void)
-{
-       return dev3.state;
-}
-EXPORT_SYMBOL(get_latch_u5);
-
 /* rb532_set_bit - sanely set a bit
  *
  * bitval: new value for the bit
@@ -249,17 +221,6 @@ int __init rb532_gpio_init(void)
        /* Register our GPIO chip */
        gpiochip_add(&rb532_gpio_chip->chip);
 
-       rb532_dev3_ctl_res[0].start = readl(IDT434_REG_BASE + DEV3BASE);
-       rb532_dev3_ctl_res[0].end = rb532_dev3_ctl_res[0].start + 0x1000;
-
-       r = rb532_dev3_ctl_res;
-       dev3.base = ioremap_nocache(r->start, r->end - r->start);
-
-       if (!dev3.base) {
-               printk(KERN_ERR "rb532: cannot remap device controller 3\n");
-               return -ENXIO;
-       }
-
        return 0;
 }
 arch_initcall(rb532_gpio_init);