pmdomain: ti: Fix STANDBY handling of PER power domain
authorSukrut Bellary <sbellary@baylibre.com>
Tue, 18 Mar 2025 23:00:40 +0000 (16:00 -0700)
committerUlf Hansson <ulf.hansson@linaro.org>
Mon, 19 May 2025 14:11:05 +0000 (16:11 +0200)
Per AM335x TRM[1](section 8.1.4.3 Power mode), in case of STANDBY,
PER domain should be ON. So, fix the PER power domain handling on standby.

[1] https://www.ti.com/lit/ug/spruh73q/spruh73q.pdf

Signed-off-by: Sukrut Bellary <sbellary@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20250318230042.3138542-3-sbellary@baylibre.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/pmdomain/ti/omap_prm.c

index 79d165331d8c637901f340299f03ae9988424fe0..5142f064bf5cdc1158524b1d5b26f23c9f7bd2d6 100644 (file)
@@ -18,7 +18,9 @@
 #include <linux/pm_domain.h>
 #include <linux/reset-controller.h>
 #include <linux/delay.h>
-
+#if IS_ENABLED(CONFIG_SUSPEND)
+#include <linux/suspend.h>
+#endif
 #include <linux/platform_data/ti-prm.h>
 
 enum omap_prm_domain_mode {
@@ -88,6 +90,7 @@ struct omap_reset_data {
 #define OMAP_PRM_HAS_RSTST     BIT(1)
 #define OMAP_PRM_HAS_NO_CLKDM  BIT(2)
 #define OMAP_PRM_RET_WHEN_IDLE BIT(3)
+#define OMAP_PRM_ON_WHEN_STANDBY       BIT(4)
 
 #define OMAP_PRM_HAS_RESETS    (OMAP_PRM_HAS_RSTCTRL | OMAP_PRM_HAS_RSTST)
 
@@ -404,7 +407,8 @@ static const struct omap_prm_data am3_prm_data[] = {
                .name = "per", .base = 0x44e00c00,
                .pwrstctrl = 0xc, .pwrstst = 0x8, .dmap = &omap_prm_noinact,
                .rstctrl = 0x0, .rstmap = am3_per_rst_map,
-               .flags = OMAP_PRM_HAS_RSTCTRL, .clkdm_name = "pruss_ocp"
+               .flags = OMAP_PRM_HAS_RSTCTRL | OMAP_PRM_ON_WHEN_STANDBY,
+               .clkdm_name = "pruss_ocp",
        },
        {
                .name = "wkup", .base = 0x44e00d00,