ASoC: tegra: CIF: Add Tegra264 support
authorSheetal <sheetal@nvidia.com>
Mon, 12 May 2025 05:17:39 +0000 (05:17 +0000)
committerMark Brown <broonie@kernel.org>
Thu, 22 May 2025 10:02:05 +0000 (11:02 +0100)
In Tegra264, the CIF register data bit positions are changed for I2S,
AMX, ADX and ADMAIF AHUB modules, as they now support a maximum of
32 channels. tegra264_set_cif API added to set the CIF for IPs supporting
32 channels.

Signed-off-by: Sheetal <sheetal@nvidia.com>
Link: https://patch.msgid.link/20250512051747.1026770-4-sheetal@nvidia.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/tegra/tegra_cif.h

index 7cca8068f4b58130b842cfe051f0cadff2620bd9..916aa10d8af8ca747f5a06bc4db20d2ef4c30f79 100644 (file)
@@ -1,8 +1,7 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * tegra_cif.h - TEGRA Audio CIF Programming
+/* SPDX-License-Identifier: GPL-2.0-only
+ * SPDX-FileCopyrightText: Copyright (c) 2020-2025 NVIDIA CORPORATION. All rights reserved.
  *
- * Copyright (c) 2020 NVIDIA CORPORATION.  All rights reserved.
+ * tegra_cif.h - TEGRA Audio CIF Programming
  *
  */
 
 #define TEGRA_ACIF_CTRL_TRUNCATE_SHIFT         1
 #define TEGRA_ACIF_CTRL_MONO_CONV_SHIFT                0
 
+#define TEGRA264_ACIF_CTRL_AUDIO_BITS_SHIFT    11
+#define TEGRA264_ACIF_CTRL_CLIENT_CH_SHIFT     14
+#define TEGRA264_ACIF_CTRL_AUDIO_CH_SHIFT      19
+
 /* AUDIO/CLIENT_BITS values */
 #define TEGRA_ACIF_BITS_8                      1
 #define TEGRA_ACIF_BITS_16                     3
@@ -62,4 +65,23 @@ static inline void tegra_set_cif(struct regmap *regmap, unsigned int reg,
        regmap_update_bits(regmap, reg, TEGRA_ACIF_UPDATE_MASK, value);
 }
 
+static inline void tegra264_set_cif(struct regmap *regmap, unsigned int reg,
+                                   struct tegra_cif_conf *conf)
+{
+       unsigned int value;
+
+       value = (conf->threshold << TEGRA_ACIF_CTRL_FIFO_TH_SHIFT) |
+               ((conf->audio_ch - 1) << TEGRA264_ACIF_CTRL_AUDIO_CH_SHIFT) |
+               ((conf->client_ch - 1) << TEGRA264_ACIF_CTRL_CLIENT_CH_SHIFT) |
+               (conf->audio_bits << TEGRA264_ACIF_CTRL_AUDIO_BITS_SHIFT) |
+               (conf->client_bits << TEGRA_ACIF_CTRL_CLIENT_BITS_SHIFT) |
+               (conf->expand << TEGRA_ACIF_CTRL_EXPAND_SHIFT) |
+               (conf->stereo_conv << TEGRA_ACIF_CTRL_STEREO_CONV_SHIFT) |
+               (conf->replicate << TEGRA_ACIF_CTRL_REPLICATE_SHIFT) |
+               (conf->truncate << TEGRA_ACIF_CTRL_TRUNCATE_SHIFT) |
+               (conf->mono_conv << TEGRA_ACIF_CTRL_MONO_CONV_SHIFT);
+
+       regmap_update_bits(regmap, reg, TEGRA_ACIF_UPDATE_MASK, value);
+}
+
 #endif