drm/amd/amdgpu: Add gpr reading for GFX v6
authorTom St Denis <tom.stdenis@amd.com>
Mon, 5 Dec 2016 18:24:07 +0000 (13:24 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 8 Dec 2016 19:12:17 +0000 (14:12 -0500)
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

index 879a94bbfe12939661301ae35694317bbb72cd65..558640aee15a178f9e79ba786bd67bfc12c7d197 100644 (file)
@@ -2827,6 +2827,21 @@ static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_
        return RREG32(mmSQ_IND_DATA);
 }
 
+static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd,
+                          uint32_t wave, uint32_t thread,
+                          uint32_t regno, uint32_t num, uint32_t *out)
+{
+       WREG32(mmSQ_IND_INDEX,
+               (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) |
+               (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) |
+               (regno << SQ_IND_INDEX__INDEX__SHIFT) |
+               (thread << SQ_IND_INDEX__THREAD_ID__SHIFT) |
+               (SQ_IND_INDEX__FORCE_READ_MASK) |
+               (SQ_IND_INDEX__AUTO_INCR_MASK));
+       while (num--)
+               *(out++) = RREG32(mmSQ_IND_DATA);
+}
+
 static void gfx_v6_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields)
 {
        /* type 0 wave data */
@@ -2851,10 +2866,20 @@ static void gfx_v6_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, u
        dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0);
 }
 
+static void gfx_v6_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t simd,
+                                    uint32_t wave, uint32_t start,
+                                    uint32_t size, uint32_t *dst)
+{
+       wave_read_regs(
+               adev, simd, wave, 0,
+               start + SQIND_WAVE_SGPRS_OFFSET, size, dst);
+}
+
 static const struct amdgpu_gfx_funcs gfx_v6_0_gfx_funcs = {
        .get_gpu_clock_counter = &gfx_v6_0_get_gpu_clock_counter,
        .select_se_sh = &gfx_v6_0_select_se_sh,
        .read_wave_data = &gfx_v6_0_read_wave_data,
+       .read_wave_sgprs = &gfx_v6_0_read_wave_sgprs,
 };
 
 static int gfx_v6_0_early_init(void *handle)