powerpc/8xx: Inconditionally use task PGDIR in ITLB misses

Now that modules exec page tables are preallocated, the instruction
TLBmiss handler can use task PGDIR inconditionally.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/774fd766a8b9bcb9173b5e677d5dad0df2d3970f.1724173828.git.christophe.leroy@csgroup.eu

diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index 66ee0a31d99d375342e639cc34807f2cbf92b383..f9a05648a52299d9b21b2996a6ed8c09fb1a8706 100644 (file)
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -199,18 +199,7 @@ instruction_counter:
        mfspr   r10, SPRN_SRR0  /* Get effective address of fault */
        INVALIDATE_ADJACENT_PAGES_CPU15(r10, r11)
        mtspr   SPRN_MD_EPN, r10
-#ifdef CONFIG_EXECMEM
-       mfcr    r11
-       compare_to_kernel_boundary r10, r10
-#endif
        mfspr   r10, SPRN_M_TWB /* Get level 1 table */
-#ifdef CONFIG_EXECMEM
-       blt+    3f
-       rlwinm  r10, r10, 0, 20, 31
-       oris    r10, r10, (swapper_pg_dir - PAGE_OFFSET)@ha
-3:
-       mtcr    r11
-#endif
        lwz     r11, (swapper_pg_dir-PAGE_OFFSET)@l(r10)        /* Get level 1 entry */
        mtspr   SPRN_MD_TWC, r11
        mfspr   r10, SPRN_MD_TWC