drm/amd/display: Address coverity change

[Why]
Coverity picks up a defect with regards to array underflow.

[How]
Address coverity issue as recommended.

Reviewed-by: Leo Ma <hanghong.ma@amd.com>
Signed-off-by: Chris Park <chris.park@amd.com>
Signed-off-by: Wayne Lin <wayne.lin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c
index cce425dd62d2d55eaece4016474ae3fb88b3d85f..01ea3a31e54da64f1b8d735970e9be53b93c8609 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c
@@ -517,10 +517,12 @@ static void dcn401_update_clocks_update_dtb_dto(struct clk_mgr_internal *clk_mgr
                if (!use_hpo_encoder)
                        continue;
 
-               otg_master->clock_source->funcs->program_pix_clk(
+               if (otg_master->stream_res.pix_clk_params.controller_id > CONTROLLER_ID_UNDEFINED)
+                       otg_master->clock_source->funcs->program_pix_clk(
                                otg_master->clock_source,
                                &otg_master->stream_res.pix_clk_params,
-                               dccg->ctx->dc->link_srv->dp_get_encoding_format(&otg_master->link_config.dp_link_settings),
+                               dccg->ctx->dc->link_srv->dp_get_encoding_format(
+                                       &otg_master->link_config.dp_link_settings),
                                &otg_master->pll_settings);
        }
 }