drm/msm/adreno: fix CP cycles stat retrieval on a7xx

a7xx_submit() should use the a7xx variant of the RBBM_PERFCTR_CP register
for retrieving the CP cycles value before and after the submitted command
stream execution.

Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Fixes: af66706accdf ("drm/msm/a6xx: Add skeleton A7xx support")
Patchwork: https://patchwork.freedesktop.org/patch/588445/
Signed-off-by: Rob Clark <robdclark@chromium.org>

diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index 65a9663db3a545e86c4a7b9e532a809a0effcd43..e96ba41fd131ab30b410098ce9557777bce76fc5 100644 (file)
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -284,7 +284,7 @@ static void a7xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit)
 
        a6xx_set_pagetable(a6xx_gpu, ring, submit->queue->ctx);
 
-       get_stats_counter(ring, REG_A6XX_RBBM_PERFCTR_CP(0),
+       get_stats_counter(ring, REG_A7XX_RBBM_PERFCTR_CP(0),
                rbmemptr_stats(ring, index, cpcycles_start));
        get_stats_counter(ring, REG_A6XX_CP_ALWAYS_ON_COUNTER,
                rbmemptr_stats(ring, index, alwayson_start));
@@ -330,7 +330,7 @@ static void a7xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit)
        OUT_PKT7(ring, CP_SET_MARKER, 1);
        OUT_RING(ring, 0x00e); /* IB1LIST end */
 
-       get_stats_counter(ring, REG_A6XX_RBBM_PERFCTR_CP(0),
+       get_stats_counter(ring, REG_A7XX_RBBM_PERFCTR_CP(0),
                rbmemptr_stats(ring, index, cpcycles_end));
        get_stats_counter(ring, REG_A6XX_CP_ALWAYS_ON_COUNTER,
                rbmemptr_stats(ring, index, alwayson_end));