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PCI: Add ACS quirks for Cavium multi-function devices
author
George Cherian
<george.cherian@marvell.com>
Tue, 10 Aug 2021 12:24:25 +0000
(17:54 +0530)
committer
Bjorn Helgaas
<bhelgaas@google.com>
Fri, 20 Aug 2021 21:13:49 +0000
(16:13 -0500)
Some Cavium endpoints are implemented as multi-function devices without ACS
capability, but they actually don't support peer-to-peer transactions.
Add ACS quirks to declare DMA isolation for the following devices:
- BGX device found on Octeon-TX (8xxx)
- CGX device found on Octeon-TX2 (9xxx)
- RPM device found on Octeon-TX3 (10xxx)
Link:
https://lore.kernel.org/r/20210810122425.1115156-1-george.cherian@marvell.com
Signed-off-by: George Cherian <george.cherian@marvell.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
drivers/pci/quirks.c
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diff --git
a/drivers/pci/quirks.c
b/drivers/pci/quirks.c
index 207d089a8d37d502bcd4a19699a1e849b79c50b2..92ed566c761cd7eceae60432558aa3c27d9679b4 100644
(file)
--- a/
drivers/pci/quirks.c
+++ b/
drivers/pci/quirks.c
@@
-4852,6
+4852,10
@@
static const struct pci_dev_acs_enabled {
{ 0x10df, 0x720, pci_quirk_mf_endpoint_acs }, /* Emulex Skyhawk-R */
/* Cavium ThunderX */
{ PCI_VENDOR_ID_CAVIUM, PCI_ANY_ID, pci_quirk_cavium_acs },
+ /* Cavium multi-function devices */
+ { PCI_VENDOR_ID_CAVIUM, 0xA026, pci_quirk_mf_endpoint_acs },
+ { PCI_VENDOR_ID_CAVIUM, 0xA059, pci_quirk_mf_endpoint_acs },
+ { PCI_VENDOR_ID_CAVIUM, 0xA060, pci_quirk_mf_endpoint_acs },
/* APM X-Gene */
{ PCI_VENDOR_ID_AMCC, 0xE004, pci_quirk_xgene_acs },
/* Ampere Computing */