KVM: riscv: selftests: Fix get-reg-list print_reg defaults
authorAndrew Jones <ajones@ventanamicro.com>
Thu, 7 Dec 2023 13:40:13 +0000 (14:40 +0100)
committerAnup Patel <anup@brainfault.org>
Wed, 13 Dec 2023 06:25:15 +0000 (11:55 +0530)
print_reg() will print everything it knows when it encounters
a register ID it's unfamiliar with in the default cases of its
decoding switches. Fix several issues with these (until now,
never tested) paths; missing newlines in printfs, missing
complement operator in mask, and missing return in order to
avoid continuing to decode.

Fixes: 62d0c458f828 ("KVM: riscv: selftests: get-reg-list print_reg should never fail")
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Haibo Xu <haibo1.xu@intel.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
tools/testing/selftests/kvm/riscv/get-reg-list.c

index 6bedaea95395151fa6436d4c5e582022e6d2bb88..25de4b8bc3472ecbe705367605c804abed408f17 100644 (file)
@@ -458,8 +458,9 @@ void print_reg(const char *prefix, __u64 id)
                reg_size = "KVM_REG_SIZE_U128";
                break;
        default:
-               printf("\tKVM_REG_RISCV | (%lld << KVM_REG_SIZE_SHIFT) | 0x%llx /* UNKNOWN */,",
-                      (id & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT, id & REG_MASK);
+               printf("\tKVM_REG_RISCV | (%lld << KVM_REG_SIZE_SHIFT) | 0x%llx /* UNKNOWN */,\n",
+                      (id & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT, id & ~REG_MASK);
+               return;
        }
 
        switch (id & KVM_REG_RISCV_TYPE_MASK) {
@@ -496,8 +497,9 @@ void print_reg(const char *prefix, __u64 id)
                                reg_size, sbi_ext_id_to_str(prefix, id));
                break;
        default:
-               printf("\tKVM_REG_RISCV | %s | 0x%llx /* UNKNOWN */,",
-                               reg_size, id & REG_MASK);
+               printf("\tKVM_REG_RISCV | %s | 0x%llx /* UNKNOWN */,\n",
+                               reg_size, id & ~REG_MASK);
+               return;
        }
 }