riscv: dts: thead: add basic spi node

created spi0 node with fixed clock. the spi0 node
uses synopsis designware driver and has the following
compatible "snps,dw-apb-ssi". the spi0 node is connected
to a SPI NOR flash pad which is left unpopulated on the back
side of the board.

Acked-by: Drew Fustini <drew@pdp7.com>
Signed-off-by: Kanak Shilledar <kanakshilledar@gmail.com>
Signed-off-by: Drew Fustini <drew@pdp7.com>

diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
index d9b4de9e4757421dfffdf68a6ddfe574a9f28822..b4d2e1d69bdb75337db46cb565d865f0c945b60a 100644 (file)
--- a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
+++ b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
@@ -23,6 +23,7 @@
                serial3 = &uart3;
                serial4 = &uart4;
                serial5 = &uart5;
+               spi0 = &spi0;
        };
 
        chosen {
@@ -52,6 +53,10 @@
        clock-frequency = <198000000>;
 };
 
+&spi_clk {
+       clock-frequency = <396000000>;
+};
+
 &uart_sclk {
        clock-frequency = <100000000>;
 };
@@ -79,3 +84,7 @@
 &uart0 {
        status = "okay";
 };
+
+&spi0 {
+       status = "okay";
+};

diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
index 1365d3a512a3b9df7fffdcfa2262f822fd819a9d..6939bd36560ca9220d840f7cb3e17970bf4af9d8 100644 (file)
--- a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
@@ -33,6 +33,10 @@
        clock-frequency = <198000000>;
 };
 
+&spi_clk {
+       clock-frequency = <396000000>;
+};
+
 &uart_sclk {
        clock-frequency = <100000000>;
 };

diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts b/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts
index 9a3884a73e13721f26ee5927eea80b3e71da0959..7738d2895c5accc25028b61135949b5f98471fef 100644 (file)
--- a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts
+++ b/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts
@@ -20,6 +20,7 @@
                serial3 = &uart3;
                serial4 = &uart4;
                serial5 = &uart5;
+               spi0 = &spi0;
        };
 
        chosen {
@@ -30,3 +31,7 @@
 &uart0 {
        status = "okay";
 };
+
+&spi0 {
+       status = "okay";
+};

diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
index 3c9974062c206b870ebe85b91da2a04e5bc7b879..aa703da30fc38881e6a0749d8e8e4523b4d0a711 100644 (file)
--- a/arch/riscv/boot/dts/thead/th1520.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520.dtsi
@@ -221,6 +221,12 @@
                #clock-cells = <0>;
        };
 
+       spi_clk: spi-clock {
+               compatible = "fixed-clock";
+               clock-output-names = "spi_clk";
+               #clock-cells = <0>;
+       };
+
        uart_sclk: uart-sclk-clock {
                compatible = "fixed-clock";
                clock-output-names = "uart_sclk";
@@ -264,6 +270,16 @@
                                              <&cpu3_intc 3>, <&cpu3_intc 7>;
                };
 
+               spi0: spi@ffe700c000 {
+                       compatible = "thead,th1520-spi", "snps,dw-apb-ssi";
+                       reg = <0xff 0xe700c000 0x0 0x1000>;
+                       interrupts = <54 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&spi_clk>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
                uart0: serial@ffe7014000 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0xff 0xe7014000 0x0 0x100>;