ARM: dts: exynos: Use standard arrays of generic PHYs for EHCI/OHCI devices
authorMarek Szyprowski <m.szyprowski@samsung.com>
Fri, 26 Jul 2019 08:14:53 +0000 (10:14 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 30 Jul 2019 11:00:37 +0000 (13:00 +0200)
Move USB PHYs to a standard arrays for Exynos EHCI/OHCI devices. This
resolves the conflict between Exynos EHCI/OHCI sub-nodes and generic USB
device bindings. Once the Exynos EHCI/OHCI sub-nodes are removed, the
boards can finally provide sub-nodes for the USB devices using generic USB
device bindings.

Suggested-by: Måns Rullgård <mans@mansr.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20190726081453.9456-4-m.szyprowski@samsung.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/arm/boot/dts/exynos4.dtsi
arch/arm/boot/dts/exynos4210-universal_c210.dts
arch/arm/boot/dts/exynos4412-itop-elite.dts
arch/arm/boot/dts/exynos4412-odroidu3.dts
arch/arm/boot/dts/exynos4412-odroidx.dts
arch/arm/boot/dts/exynos4412-origen.dts
arch/arm/boot/dts/exynos5250.dtsi
arch/arm/boot/dts/exynos54xx.dtsi

index 1264cc431ff6f0654d1affc20ab81c945e44e7df..433f109d97cae7d56be37861c4cc47d84bf2eb1d 100644 (file)
                        clocks = <&clock CLK_USB_HOST>;
                        clock-names = "usbhost";
                        status = "disabled";
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       port@0 {
-                               reg = <0>;
-                               phys = <&exynos_usbphy 1>;
-                               status = "disabled";
-                       };
-                       port@1 {
-                               reg = <1>;
-                               phys = <&exynos_usbphy 2>;
-                               status = "disabled";
-                       };
-                       port@2 {
-                               reg = <2>;
-                               phys = <&exynos_usbphy 3>;
-                               status = "disabled";
-                       };
+                       phys = <&exynos_usbphy 1>, <&exynos_usbphy 2>, <&exynos_usbphy 3>;
+                       phy-names = "host", "hsic0", "hsic1";
                };
 
                ohci: ohci@12590000 {
                        clocks = <&clock CLK_USB_HOST>;
                        clock-names = "usbhost";
                        status = "disabled";
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       port@0 {
-                               reg = <0>;
-                               phys = <&exynos_usbphy 1>;
-                               status = "disabled";
-                       };
+                       phys = <&exynos_usbphy 1>;
+                       phy-names = "host";
                };
 
                gpu: gpu@13000000 {
index 82a8b5449978a166d4fd1e2d120e54deee98d852..09d3d54d09ff8bf32988d49f2f223d262c799b46 100644 (file)
 
 &ehci {
        status = "okay";
-       port@0 {
-               status = "okay";
-       };
+       phys = <&exynos_usbphy 1>;
+       phy-names = "host";
 };
 
 &exynos_usbphy {
 
 &ohci {
        status = "okay";
-       port@0 {
-               status = "okay";
-       };
 };
 
 &pinctrl_1 {
index 0dedeba89b5f46d9c3637e90413441adc2139ae1..f6d0a5f5d339edf76da9373fdd7ceb81fb54317e 100644 (file)
        /* In order to reset USB ethernet */
        samsung,vbus-gpio = <&gpc0 1 GPIO_ACTIVE_HIGH>;
 
-       port@0 {
-               status = "okay";
-       };
-
-       port@2 {
-               status = "okay";
-       };
+       phys = <&exynos_usbphy 1>, <&exynos_usbphy 3>;
+       phy-names = "host", "hsic1";
 };
 
 &exynos_usbphy {
index 96d99887bceb555d6787e833bd443585e048be43..8ff243ba454260f240d65f51d740fbcab17bd4f4 100644 (file)
 };
 
 &ehci {
-       port@1 {
-               status = "okay";
-       };
-       port@2 {
-               status = "okay";
-       };
+       phys = <&exynos_usbphy 2>, <&exynos_usbphy 3>;
+       phy-names = "hsic0", "hsic1";
 };
 
 &sound {
index a2251581f6b60223bedb1d2b0dd594c34c73dab6..3ea2a0101e8086f2b8078a4593ee19d2c2540aa1 100644 (file)
@@ -72,9 +72,8 @@
 };
 
 &ehci {
-       port@1 {
-               status = "okay";
-       };
+       phys = <&exynos_usbphy 2>;
+       phy-names = "hsic0";
 };
 
 &mshc_0 {
index 698de4345d16e672b28fb5386d1c0fec9b4763fa..ecd14b283a6b409d5fdf5488f2af3db0bc543a0b 100644 (file)
 &ehci {
        samsung,vbus-gpio = <&gpx3 5 1>;
        status = "okay";
-
-       port@1 {
-               status = "okay";
-       };
-       port@2 {
-               status = "okay";
-       };
+       phys = <&exynos_usbphy 2>, <&exynos_usbphy 3>;
+       phy-names = "hsic0", "hsic1";
 };
 
 &fimd {
index d5e0392b409ecada566fbd2f43c74b0aa57c8608..c5584f40ebfb28c1479216966bc152098a11f5a9 100644 (file)
 
                        clocks = <&clock CLK_USB2>;
                        clock-names = "usbhost";
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       port@0 {
-                               reg = <0>;
-                               phys = <&usb2_phy_gen 1>;
-                       };
+                       phys = <&usb2_phy_gen 1>;
+                       phy-names = "host";
                };
 
                ohci: usb@12120000 {
 
                        clocks = <&clock CLK_USB2>;
                        clock-names = "usbhost";
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       port@0 {
-                               reg = <0>;
-                               phys = <&usb2_phy_gen 1>;
-                       };
+                       phys = <&usb2_phy_gen 1>;
+                       phy-names = "host";
                };
 
                usb2_phy_gen: phy@12130000 {
index 0b27bebf9528c20bcdb85f7d5c354e8937f44264..9c3b63b7cac6c54f2f6ec49f71230b62d163b526 100644 (file)
                        compatible = "samsung,exynos4210-ehci";
                        reg = <0x12110000 0x100>;
                        interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
-
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       port@0 {
-                               reg = <0>;
-                               phys = <&usb2_phy 1>;
-                       };
+                       phys = <&usb2_phy 1>;
+                       phy-names = "host";
                };
 
                usbhost1: usb@12120000 {
                        compatible = "samsung,exynos4210-ohci";
                        reg = <0x12120000 0x100>;
                        interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
-
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       port@0 {
-                               reg = <0>;
-                               phys = <&usb2_phy 1>;
-                       };
+                       phys = <&usb2_phy 1>;
+                       phy-names = "host";
                };
 
                usb2_phy: phy@12130000 {