KVM: SVM: Advertise TSA CPUID bits to guests

Synthesize the TSA CPUID feature bits for guests. Set TSA_{SQ,L1}_NO on
unaffected machines.

Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>

diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index b4a391929cdbaa9960e870ade649606bdcab2e9a..eb559f3564c644c8a6ca66c6585362ec27ef44da 100644 (file)
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -764,6 +764,7 @@ enum kvm_only_cpuid_leafs {
        CPUID_8000_0022_EAX,
        CPUID_7_2_EDX,
        CPUID_24_0_EBX,
+       CPUID_8000_0021_ECX,
        NR_KVM_CPU_CAPS,
 
        NKVMCAPINTS = NR_KVM_CPU_CAPS - NCAPINTS,

diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index b2d006756e02a68362e3ab32c2fc7cc187dbbeea..f84bc0569c9c3020a1bfee322a9ea5ecea370f26 100644 (file)
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -1165,6 +1165,8 @@ void kvm_set_cpu_caps(void)
                 */
                SYNTHESIZED_F(LFENCE_RDTSC),
                /* SmmPgCfgLock */
+               /* 4: Resv */
+               SYNTHESIZED_F(VERW_CLEAR),
                F(NULL_SEL_CLR_BASE),
                /* UpperAddressIgnore */
                F(AUTOIBRS),
@@ -1179,6 +1181,11 @@ void kvm_set_cpu_caps(void)
                F(SRSO_USER_KERNEL_NO),
        );
 
+       kvm_cpu_cap_init(CPUID_8000_0021_ECX,
+               SYNTHESIZED_F(TSA_SQ_NO),
+               SYNTHESIZED_F(TSA_L1_NO),
+       );
+
        kvm_cpu_cap_init(CPUID_8000_0022_EAX,
                F(PERFMON_V2),
        );
@@ -1748,8 +1755,9 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
                entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
                break;
        case 0x80000021:
-               entry->ebx = entry->ecx = entry->edx = 0;
+               entry->ebx = entry->edx = 0;
                cpuid_entry_override(entry, CPUID_8000_0021_EAX);
+               cpuid_entry_override(entry, CPUID_8000_0021_ECX);
                break;
        /* AMD Extended Performance Monitoring and Debug */
        case 0x80000022: {

diff --git a/arch/x86/kvm/reverse_cpuid.h b/arch/x86/kvm/reverse_cpuid.h
index fde0ae9860039ca8e10445d1744edcf8f695ce62..c53b92379e6e65aa68b0741682f7219063462592 100644 (file)
--- a/arch/x86/kvm/reverse_cpuid.h
+++ b/arch/x86/kvm/reverse_cpuid.h
@@ -52,6 +52,10 @@
 /* CPUID level 0x80000022 (EAX) */
 #define KVM_X86_FEATURE_PERFMON_V2     KVM_X86_FEATURE(CPUID_8000_0022_EAX, 0)
 
+/* CPUID level 0x80000021 (ECX) */
+#define KVM_X86_FEATURE_TSA_SQ_NO      KVM_X86_FEATURE(CPUID_8000_0021_ECX, 1)
+#define KVM_X86_FEATURE_TSA_L1_NO      KVM_X86_FEATURE(CPUID_8000_0021_ECX, 2)
+
 struct cpuid_reg {
        u32 function;
        u32 index;
@@ -82,6 +86,7 @@ static const struct cpuid_reg reverse_cpuid[] = {
        [CPUID_8000_0022_EAX] = {0x80000022, 0, CPUID_EAX},
        [CPUID_7_2_EDX]       = {         7, 2, CPUID_EDX},
        [CPUID_24_0_EBX]      = {      0x24, 0, CPUID_EBX},
+       [CPUID_8000_0021_ECX] = {0x80000021, 0, CPUID_ECX},
 };
 
 /*
@@ -121,6 +126,8 @@ static __always_inline u32 __feature_translate(int x86_feature)
        KVM_X86_TRANSLATE_FEATURE(PERFMON_V2);
        KVM_X86_TRANSLATE_FEATURE(RRSBA_CTRL);
        KVM_X86_TRANSLATE_FEATURE(BHI_CTRL);
+       KVM_X86_TRANSLATE_FEATURE(TSA_SQ_NO);
+       KVM_X86_TRANSLATE_FEATURE(TSA_L1_NO);
        default:
                return x86_feature;
        }