ARM: dts: rockchip: set default rates for core clocks on rk322x

Set sane default frequencies for CPLL, GPLL and some other core clocks
on the rk322x.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index 816b0796d816d489553f5d317c0b99c434f08af7..c256df9a2cd83b6adb2fe24c48f685c9e19db76b 100644 (file)
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -346,8 +346,18 @@
                rockchip,grf = <&grf>;
                #clock-cells = <1>;
                #reset-cells = <1>;
-               assigned-clocks = <&cru PLL_GPLL>;
-               assigned-clock-rates = <594000000>;
+               assigned-clocks =
+                       <&cru PLL_GPLL>, <&cru ARMCLK>,
+                       <&cru PLL_CPLL>, <&cru ACLK_PERI>,
+                       <&cru HCLK_PERI>, <&cru PCLK_PERI>,
+                       <&cru ACLK_CPU>, <&cru HCLK_CPU>,
+                       <&cru PCLK_CPU>;
+               assigned-clock-rates =
+                       <594000000>, <816000000>,
+                       <500000000>, <150000000>,
+                       <150000000>, <75000000>,
+                       <150000000>, <150000000>,
+                       <75000000>;
        };
 
        thermal-zones {