clk: sophgo: Use div64* for 64-by-32 division to simplify

Fixes Coccinelle/coccicheck warnings reported by do_div.cocci.

cocci warnings:
    drivers/clk/sophgo/clk-sg2042-pll.c:217:1-7: WARNING:
    do_div() does a 64-by-32 division, please consider using div64_ul
    instead.

    drivers/clk/sophgo/clk-sg2042-pll.c:160:1-7: WARNING:
    do_div() does a 64-by-32 division, please consider using div64_u64
    instead.

replace do_div() with div64_*() which doesn't implicitly cast the divisor.

Signed-off-by: Pei Xiao <xiaopei01@kylinos.cn>
Link: https://lore.kernel.org/r/tencent_D5D35C992B70843CF70F5533E49717D24906@qq.com
Reviewed-by: Inochi Amaoto <inochiama@gmail.com>
Reviewed-by: Chen Wang <wangchen20@iscas.ac.cn>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

diff --git a/drivers/clk/sophgo/clk-sg2042-pll.c b/drivers/clk/sophgo/clk-sg2042-pll.c
index 1537f4f05860ea2b2d4d3615a658a6673336589b..e5fb0bb7ac4f97616f3b472fcab45e5729eb653e 100644 (file)
--- a/drivers/clk/sophgo/clk-sg2042-pll.c
+++ b/drivers/clk/sophgo/clk-sg2042-pll.c
@@ -155,7 +155,7 @@ static unsigned long sg2042_pll_recalc_rate(unsigned int reg_value,
 
        numerator = (u64)parent_rate * ctrl_table.fbdiv;
        denominator = ctrl_table.refdiv * ctrl_table.postdiv1 * ctrl_table.postdiv2;
-       do_div(numerator, denominator);
+       numerator =  div64_u64(numerator, denominator);
        return numerator;
 }
 
@@ -212,7 +212,7 @@ static int sg2042_pll_get_postdiv_1_2(unsigned long rate,
        tmp0 *= fbdiv;
 
        /* ((prate/REFDIV) x FBDIV)/rate and result save to tmp0 */
-       do_div(tmp0, rate);
+       tmp0 = div64_ul(tmp0, rate);
 
        /* tmp0 is POSTDIV1*POSTDIV2, now we calculate div1 and div2 value */
        if (tmp0 <= 7) {