drm/amdgpu: skip cg/pg set for SRIOV
authorMonk Liu <Monk.Liu@amd.com>
Thu, 23 Apr 2020 03:09:23 +0000 (11:09 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 24 Apr 2020 15:42:11 +0000 (11:42 -0400)
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Yintian Tao <yttao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

index e1687e408e1d2baeea20bcb6c406d72e8dbcd817..97659be2cf36a485568c2e6f1340f4ace0e14121 100644 (file)
@@ -7095,6 +7095,10 @@ static int gfx_v10_0_set_powergating_state(void *handle,
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
        bool enable = (state == AMD_PG_STATE_GATE);
+
+       if (amdgpu_sriov_vf(adev))
+               return 0;
+
        switch (adev->asic_type) {
        case CHIP_NAVI10:
        case CHIP_NAVI14:
@@ -7115,6 +7119,9 @@ static int gfx_v10_0_set_clockgating_state(void *handle,
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
+       if (amdgpu_sriov_vf(adev))
+               return 0;
+
        switch (adev->asic_type) {
        case CHIP_NAVI10:
        case CHIP_NAVI14: