clk: cs2000-cp: freeze config during register fiddling

Make sure to freeze the configuration of the chip during the programming
of 32-bit registers. This avoids the processing of invalid intermediate
states.

Signed-off-by: Daniel Mack <daniel@zonque.org>
Link: https://lore.kernel.org/r/20220125093336.226787-9-daniel@zonque.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

diff --git a/drivers/clk/clk-cs2000-cp.c b/drivers/clk/clk-cs2000-cp.c
index 9f99e39b41f233362f745a57b15488feda85d8dd..1baf0595ba59e15b53102eb7608230b890668f2a 100644 (file)
--- a/drivers/clk/clk-cs2000-cp.c
+++ b/drivers/clk/clk-cs2000-cp.c
@@ -52,6 +52,7 @@
 #define FRACNSRC_DYNAMIC       (1 << 0)
 
 /* GLOBAL_CFG */
+#define FREEZE         (1 << 7)
 #define ENDEV2         (0x1)
 
 /* FUNC_CFG1 */
@@ -335,6 +336,10 @@ static int __cs2000_set_rate(struct cs2000_priv *priv, int ch,
 {
        int ret;
 
+       ret = cs2000_bset(priv, GLOBAL_CFG, FREEZE, FREEZE);
+       if (ret < 0)
+               return ret;
+
        ret = cs2000_select_ratio_mode(priv, rate, parent_rate);
        if (ret < 0)
                return ret;
@@ -347,6 +352,10 @@ static int __cs2000_set_rate(struct cs2000_priv *priv, int ch,
        if (ret < 0)
                return ret;
 
+       ret = cs2000_bset(priv, GLOBAL_CFG, FREEZE, 0);
+       if (ret < 0)
+               return ret;
+
        priv->saved_rate        = rate;
        priv->saved_parent_rate = parent_rate;