drm/amd/powerplay: notify smu with active display count

when dc update clocks via smu, smu needs to know how many
displays active. this interface is for dc notify number
of active displays to smu.

Signed-off-by: hersen wu <hersenxs.wu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
index 4d7aeee91bc8a3abb7d0c5052661a3ab3ff4960c..41e9a7ed8680e25db8b280d228561c946af7366a 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
@@ -802,7 +802,7 @@ static int smu_smc_table_hw_init(struct smu_context *smu,
                return 0;
        }
 
-       ret = smu_init_display(smu);
+       ret = smu_init_display_count(smu, 0);
        if (ret)
                return ret;
 
@@ -1470,6 +1470,17 @@ int smu_force_performance_level(struct smu_context *smu, enum amd_dpm_forced_lev
        return ret;
 }
 
+int smu_set_display_count(struct smu_context *smu, uint32_t count)
+{
+       int ret = 0;
+
+       mutex_lock(&smu->mutex);
+       ret = smu_init_display_count(smu, count);
+       mutex_unlock(&smu->mutex);
+
+       return ret;
+}
+
 const struct amd_ip_funcs smu_ip_funcs = {
        .name = "smu",
        .early_init = smu_early_init,

diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
index 58861c0340b9a65435588c43b3ed76cc13b685fb..267c4f6eb317f9a8732257ea53cc21e5c771dd24 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
@@ -638,7 +638,7 @@ struct smu_funcs
        int (*send_smc_msg)(struct smu_context *smu, uint16_t msg);
        int (*send_smc_msg_with_param)(struct smu_context *smu, uint16_t msg, uint32_t param);
        int (*read_smc_arg)(struct smu_context *smu, uint32_t *arg);
-       int (*init_display)(struct smu_context *smu);
+       int (*init_display_count)(struct smu_context *smu, uint32_t count);
        int (*set_allowed_mask)(struct smu_context *smu);
        int (*get_enabled_mask)(struct smu_context *smu, uint32_t *feature_mask, uint32_t num);
        int (*update_feature_enable_state)(struct smu_context *smu, uint32_t feature_id, bool enabled);
@@ -752,8 +752,8 @@ struct smu_funcs
        ((smu)->funcs->read_smc_arg? (smu)->funcs->read_smc_arg((smu), (arg)) : 0)
 #define smu_alloc_dpm_context(smu) \
        ((smu)->ppt_funcs->alloc_dpm_context ? (smu)->ppt_funcs->alloc_dpm_context((smu)) : 0)
-#define smu_init_display(smu) \
-       ((smu)->funcs->init_display ? (smu)->funcs->init_display((smu)) : 0)
+#define smu_init_display_count(smu, count) \
+       ((smu)->funcs->init_display_count ? (smu)->funcs->init_display_count((smu), (count)) : 0)
 #define smu_feature_set_allowed_mask(smu) \
        ((smu)->funcs->set_allowed_mask? (smu)->funcs->set_allowed_mask((smu)) : 0)
 #define smu_feature_get_enabled_mask(smu, mask, num) \
@@ -947,4 +947,6 @@ int smu_set_hard_freq_range(struct smu_context *smu, enum smu_clk_type clk_type,
                            uint32_t min, uint32_t max);
 enum amd_dpm_forced_level smu_get_performance_level(struct smu_context *smu);
 int smu_force_performance_level(struct smu_context *smu, enum amd_dpm_forced_level level);
+int smu_set_display_count(struct smu_context *smu, uint32_t count);
+
 #endif

diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
index bab61fe46b46e4d72d440080829e63bd2a2b77f6..82e6076bbdb05560ebcd46f07e00838922b00d6b 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
@@ -765,13 +765,13 @@ static int smu_v11_0_set_tool_table_location(struct smu_context *smu)
        return ret;
 }
 
-static int smu_v11_0_init_display(struct smu_context *smu)
+static int smu_v11_0_init_display_count(struct smu_context *smu, uint32_t count)
 {
        int ret = 0;
 
        if (!smu->pm_enabled)
                return ret;
-       ret = smu_send_smc_msg_with_param(smu, SMU_MSG_NumOfDisplays, 0);
+       ret = smu_send_smc_msg_with_param(smu, SMU_MSG_NumOfDisplays, count);
        return ret;
 }
 
@@ -1686,7 +1686,7 @@ static const struct smu_funcs smu_v11_0_funcs = {
        .write_watermarks_table = smu_v11_0_write_watermarks_table,
        .set_min_dcef_deep_sleep = smu_v11_0_set_min_dcef_deep_sleep,
        .set_tool_table_location = smu_v11_0_set_tool_table_location,
-       .init_display = smu_v11_0_init_display,
+       .init_display_count = smu_v11_0_init_display_count,
        .set_allowed_mask = smu_v11_0_set_allowed_mask,
        .get_enabled_mask = smu_v11_0_get_enabled_mask,
        .system_features_control = smu_v11_0_system_features_control,