dmaengine: idxd: update IAA definitions for user header

Add additional structure definitions for Intel In-memory Analytics
Accelerator (IAA/IAX). See specification (1) for more details.

1: https://cdrdv2.intel.com/v1/dl/getContent/721858

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/164704100212.1373038.18362680016033557757.stgit@djiang5-desk3.ch.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/include/uapi/linux/idxd.h b/include/uapi/linux/idxd.h
index a8f0ff75c43073fe313afe8ba6f26612e2c5feda..bce7c43657d547d96355e20cbea6b5af0c33e823 100644 (file)
--- a/include/uapi/linux/idxd.h
+++ b/include/uapi/linux/idxd.h
@@ -53,6 +53,11 @@ enum idxd_scmd_stat {
 
 /* IAX */
 #define IDXD_OP_FLAG_RD_SRC2_AECS      0x010000
+#define IDXD_OP_FLAG_RD_SRC2_2ND       0x020000
+#define IDXD_OP_FLAG_WR_SRC2_AECS_COMP 0x040000
+#define IDXD_OP_FLAG_WR_SRC2_AECS_OVFL 0x080000
+#define IDXD_OP_FLAG_SRC2_STS          0x100000
+#define IDXD_OP_FLAG_CRC_RFC3720       0x200000
 
 /* Opcode */
 enum dsa_opcode {
@@ -81,6 +86,18 @@ enum iax_opcode {
        IAX_OPCODE_MEMMOVE,
        IAX_OPCODE_DECOMPRESS = 0x42,
        IAX_OPCODE_COMPRESS,
+       IAX_OPCODE_CRC64,
+       IAX_OPCODE_ZERO_DECOMP_32 = 0x48,
+       IAX_OPCODE_ZERO_DECOMP_16,
+       IAX_OPCODE_DECOMP_32 = 0x4c,
+       IAX_OPCODE_DECOMP_16,
+       IAX_OPCODE_SCAN = 0x50,
+       IAX_OPCODE_SET_MEMBER,
+       IAX_OPCODE_EXTRACT,
+       IAX_OPCODE_SELECT,
+       IAX_OPCODE_RLE_BURST,
+       IAX_OPCDE_FIND_UNIQUE,
+       IAX_OPCODE_EXPAND,
 };
 
 /* Completion record status */
@@ -120,6 +137,7 @@ enum iax_completion_status {
        IAX_COMP_NONE = 0,
        IAX_COMP_SUCCESS,
        IAX_COMP_PAGE_FAULT_IR = 0x04,
+       IAX_COMP_ANALYTICS_ERROR = 0x0a,
        IAX_COMP_OUTBUF_OVERFLOW,
        IAX_COMP_BAD_OPCODE = 0x10,
        IAX_COMP_INVALID_FLAGS,
@@ -140,7 +158,10 @@ enum iax_completion_status {
        IAX_COMP_WATCHDOG,
        IAX_COMP_INVALID_COMP_FLAG = 0x30,
        IAX_COMP_INVALID_FILTER_FLAG,
-       IAX_COMP_INVALID_NUM_ELEMS = 0x33,
+       IAX_COMP_INVALID_INPUT_SIZE,
+       IAX_COMP_INVALID_NUM_ELEMS,
+       IAX_COMP_INVALID_SRC1_WIDTH,
+       IAX_COMP_INVALID_INVERT_OUT,
 };
 
 #define DSA_COMP_STATUS_MASK           0x7f
@@ -319,8 +340,12 @@ struct iax_completion_record {
        uint32_t                output_size;
        uint8_t                 output_bits;
        uint8_t                 rsvd3;
-       uint16_t                rsvd4;
-       uint64_t                rsvd5[4];
+       uint16_t                xor_csum;
+       uint32_t                crc;
+       uint32_t                min;
+       uint32_t                max;
+       uint32_t                sum;
+       uint64_t                rsvd4[2];
 } __attribute__((packed));
 
 struct iax_raw_completion_record {