riscv: Add SiFive xsfvqmaccdod and xsfvqmaccqoq vendor extensions
authorCyan Yang <cyan.yang@sifive.com>
Fri, 18 Apr 2025 05:32:29 +0000 (13:32 +0800)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 8 May 2025 18:01:43 +0000 (11:01 -0700)
Add SiFive vendor extension support to the kernel with the target of
"xsfvqmaccdod" and "xsfvqmaccqoq".

Signed-off-by: Cyan Yang <cyan.yang@sifive.com>
Link: https://lore.kernel.org/r/20250418053239.4351-3-cyan.yang@sifive.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/Kconfig.vendor
arch/riscv/include/asm/vendor_extensions/sifive.h [new file with mode: 0644]
arch/riscv/kernel/vendor_extensions.c
arch/riscv/kernel/vendor_extensions/Makefile
arch/riscv/kernel/vendor_extensions/sifive.c [new file with mode: 0644]

index b096548fe0ffdd5468d8daf3aa57ba11e7800f34..e14f26368963c178e3271e0f716b27fff7671e78 100644 (file)
@@ -16,6 +16,19 @@ config RISCV_ISA_VENDOR_EXT_ANDES
          If you don't know what to do here, say Y.
 endmenu
 
+menu "SiFive"
+config RISCV_ISA_VENDOR_EXT_SIFIVE
+       bool "SiFive vendor extension support"
+       select RISCV_ISA_VENDOR_EXT
+       default y
+       help
+         Say N here if you want to disable all SiFive vendor extension
+         support. This will cause any SiFive vendor extensions that are
+         requested by hardware probing to be ignored.
+
+         If you don't know what to do here, say Y.
+endmenu
+
 menu "T-Head"
 config RISCV_ISA_VENDOR_EXT_THEAD
        bool "T-Head vendor extension support"
diff --git a/arch/riscv/include/asm/vendor_extensions/sifive.h b/arch/riscv/include/asm/vendor_extensions/sifive.h
new file mode 100644 (file)
index 0000000..6080042
--- /dev/null
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _ASM_RISCV_VENDOR_EXTENSIONS_SIFIVE_H
+#define _ASM_RISCV_VENDOR_EXTENSIONS_SIFIVE_H
+
+#include <asm/vendor_extensions.h>
+
+#include <linux/types.h>
+
+#define RISCV_ISA_VENDOR_EXT_XSFVQMACCDOD              0
+#define RISCV_ISA_VENDOR_EXT_XSFVQMACCQOQ              1
+
+extern struct riscv_isa_vendor_ext_data_list riscv_isa_vendor_ext_list_sifive;
+
+#endif
index 9feb7f67a0a3905587b0070d4a194b4edd5efec6..92d8ff81f42c9ceba63bef0170ab134564a24a4e 100644 (file)
@@ -6,6 +6,7 @@
 #include <asm/vendorid_list.h>
 #include <asm/vendor_extensions.h>
 #include <asm/vendor_extensions/andes.h>
+#include <asm/vendor_extensions/sifive.h>
 #include <asm/vendor_extensions/thead.h>
 
 #include <linux/array_size.h>
@@ -15,6 +16,9 @@ struct riscv_isa_vendor_ext_data_list *riscv_isa_vendor_ext_list[] = {
 #ifdef CONFIG_RISCV_ISA_VENDOR_EXT_ANDES
        &riscv_isa_vendor_ext_list_andes,
 #endif
+#ifdef CONFIG_RISCV_ISA_VENDOR_EXT_SIFIVE
+       &riscv_isa_vendor_ext_list_sifive,
+#endif
 #ifdef CONFIG_RISCV_ISA_VENDOR_EXT_THEAD
        &riscv_isa_vendor_ext_list_thead,
 #endif
@@ -45,6 +49,12 @@ bool __riscv_isa_vendor_extension_available(int cpu, unsigned long vendor, unsig
                cpu_bmap = riscv_isa_vendor_ext_list_andes.per_hart_isa_bitmap;
                break;
        #endif
+       #ifdef CONFIG_RISCV_ISA_VENDOR_EXT_SIFIVE
+       case SIFIVE_VENDOR_ID:
+               bmap = &riscv_isa_vendor_ext_list_sifive.all_harts_isa_bitmap;
+               cpu_bmap = riscv_isa_vendor_ext_list_sifive.per_hart_isa_bitmap;
+               break;
+       #endif
        #ifdef CONFIG_RISCV_ISA_VENDOR_EXT_THEAD
        case THEAD_VENDOR_ID:
                bmap = &riscv_isa_vendor_ext_list_thead.all_harts_isa_bitmap;
index 866414c81a9f5e7a34043918daba46e3aa54f0ec..d5fdde0e863b1780b3a6f6759892654dcc478838 100644 (file)
@@ -1,5 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
 obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_ANDES)       += andes.o
+obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_SIFIVE)      += sifive.o
 obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_THEAD)       += thead.o
 obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_THEAD)       += thead_hwprobe.o
diff --git a/arch/riscv/kernel/vendor_extensions/sifive.c b/arch/riscv/kernel/vendor_extensions/sifive.c
new file mode 100644 (file)
index 0000000..990ac83
--- /dev/null
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+#include <asm/cpufeature.h>
+#include <asm/vendor_extensions.h>
+#include <asm/vendor_extensions/sifive.h>
+
+#include <linux/array_size.h>
+#include <linux/types.h>
+
+/* All SiFive vendor extensions supported in Linux */
+const struct riscv_isa_ext_data riscv_isa_vendor_ext_sifive[] = {
+       __RISCV_ISA_EXT_DATA(xsfvqmaccdod, RISCV_ISA_VENDOR_EXT_XSFVQMACCDOD),
+       __RISCV_ISA_EXT_DATA(xsfvqmaccqoq, RISCV_ISA_VENDOR_EXT_XSFVQMACCQOQ),
+};
+
+struct riscv_isa_vendor_ext_data_list riscv_isa_vendor_ext_list_sifive = {
+       .ext_data_count = ARRAY_SIZE(riscv_isa_vendor_ext_sifive),
+       .ext_data = riscv_isa_vendor_ext_sifive,
+};