drm/amdgpu: support partition drm devices
authorJames Zhu <James.Zhu@amd.com>
Mon, 15 Aug 2022 20:55:02 +0000 (16:55 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 9 Jun 2023 13:59:20 +0000 (09:59 -0400)
Support partition drm devices on GC_HWIP IP_VERSION(9, 4, 3).

This is a temporary solution and will be superceded.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-and-tested-by: Philip Yang<Philip.Yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu.h
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.h
drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c
drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.h

index c2feaf2fd0702462d479b61b5839ad67b3e44960..eb2fb968e3af579b369b5a4ba17fb53060d308c0 100644 (file)
 #include "amdgpu_fdinfo.h"
 #include "amdgpu_mca.h"
 #include "amdgpu_ras.h"
+#include "amdgpu_xcp.h"
 
 #define MAX_GPU_INSTANCE               64
 
index 0c6f983fb2adca2540ac1705a0cec01cf9b74ae3..4d9c535bcb0cb6a8b678f70e3c6fac7b5942eea7 100644 (file)
@@ -6065,6 +6065,7 @@ void amdgpu_device_halt(struct amdgpu_device *adev)
        struct pci_dev *pdev = adev->pdev;
        struct drm_device *ddev = adev_to_drm(adev);
 
+       amdgpu_xcp_dev_unplug(adev);
        drm_dev_unplug(ddev);
 
        amdgpu_irq_disable_all(adev);
index aa466a9eb956f676d9ef9f1d333c995dbc8e150b..7300df2a342c794763d4f61b9285d024b2d87001 100644 (file)
@@ -2185,6 +2185,10 @@ retry_init:
                goto err_pci;
        }
 
+       ret = amdgpu_xcp_dev_register(adev, ent);
+       if (ret)
+               goto err_pci;
+
        /*
         * 1. don't init fbdev on hw without DCE
         * 2. don't init fbdev if there are no connectors
@@ -2257,6 +2261,7 @@ amdgpu_pci_remove(struct pci_dev *pdev)
        struct drm_device *dev = pci_get_drvdata(pdev);
        struct amdgpu_device *adev = drm_to_adev(dev);
 
+       amdgpu_xcp_dev_unplug(adev);
        drm_dev_unplug(dev);
 
        if (adev->pm.rpm_mode != AMDGPU_RUNPM_NONE) {
@@ -2840,6 +2845,33 @@ static const struct drm_driver amdgpu_kms_driver = {
        .patchlevel = KMS_DRIVER_PATCHLEVEL,
 };
 
+const struct drm_driver amdgpu_partition_driver = {
+       .driver_features =
+           DRIVER_GEM | DRIVER_RENDER | DRIVER_SYNCOBJ |
+           DRIVER_SYNCOBJ_TIMELINE,
+       .open = amdgpu_driver_open_kms,
+       .postclose = amdgpu_driver_postclose_kms,
+       .lastclose = amdgpu_driver_lastclose_kms,
+       .ioctls = amdgpu_ioctls_kms,
+       .num_ioctls = ARRAY_SIZE(amdgpu_ioctls_kms),
+       .dumb_create = amdgpu_mode_dumb_create,
+       .dumb_map_offset = amdgpu_mode_dumb_mmap,
+       .fops = &amdgpu_driver_kms_fops,
+       .release = &amdgpu_driver_release_kms,
+
+       .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
+       .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
+       .gem_prime_import = amdgpu_gem_prime_import,
+       .gem_prime_mmap = drm_gem_prime_mmap,
+
+       .name = DRIVER_NAME,
+       .desc = DRIVER_DESC,
+       .date = DRIVER_DATE,
+       .major = KMS_DRIVER_MAJOR,
+       .minor = KMS_DRIVER_MINOR,
+       .patchlevel = KMS_DRIVER_PATCHLEVEL,
+};
+
 static struct pci_error_handlers amdgpu_pci_err_handler = {
        .error_detected = amdgpu_pci_error_detected,
        .mmio_enabled   = amdgpu_pci_mmio_enabled,
index 8178323e4beff1d900ef315df347bc810f00012b..5bc2cb661af7a0b9723c7af609ccf5d8d5b42c56 100644 (file)
@@ -42,6 +42,8 @@
 #define DRIVER_DESC            "AMD GPU"
 #define DRIVER_DATE            "20150101"
 
+extern const struct drm_driver amdgpu_partition_driver;
+
 long amdgpu_drm_ioctl(struct file *filp,
                      unsigned int cmd, unsigned long arg);
 
index bca226cc4e0b031bbd961cf841aaf1d6693594a0..8b28b18e42915598fb100a1a9106bc50067a2e90 100644 (file)
@@ -22,6 +22,9 @@
  */
 #include "amdgpu.h"
 #include "amdgpu_xcp.h"
+#include "amdgpu_drv.h"
+
+#include <drm/drm_drv.h>
 
 static int __amdgpu_xcp_run(struct amdgpu_xcp_mgr *xcp_mgr,
                            struct amdgpu_xcp_ip *xcp_ip, int xcp_state)
@@ -217,6 +220,31 @@ int amdgpu_xcp_query_partition_mode(struct amdgpu_xcp_mgr *xcp_mgr, u32 flags)
        return mode;
 }
 
+static int amdgpu_xcp_dev_alloc(struct amdgpu_device *adev)
+{
+       struct drm_device *p_ddev;
+       struct pci_dev *pdev;
+       struct drm_device *ddev;
+       int i;
+
+       pdev = adev->pdev;
+       ddev = adev_to_drm(adev);
+
+       for (i = 0; i < MAX_XCP; i++) {
+               p_ddev = drm_dev_alloc(&amdgpu_partition_driver,
+                       &pci_upstream_bridge(pdev)->dev);
+               if (IS_ERR(p_ddev))
+                       return PTR_ERR(p_ddev);
+
+               /* Redirect all IOCTLs to the primary device */
+               p_ddev->render->dev = ddev;
+               p_ddev->vma_offset_manager = ddev->vma_offset_manager;
+               adev->xcp_mgr->xcp[i].ddev = p_ddev;
+       }
+
+       return 0;
+}
+
 int amdgpu_xcp_mgr_init(struct amdgpu_device *adev, int init_mode,
                        int init_num_xcps,
                        struct amdgpu_xcp_mgr_funcs *xcp_funcs)
@@ -242,7 +270,7 @@ int amdgpu_xcp_mgr_init(struct amdgpu_device *adev, int init_mode,
 
        adev->xcp_mgr = xcp_mgr;
 
-       return 0;
+       return amdgpu_xcp_dev_alloc(adev);
 }
 
 int amdgpu_xcp_get_partition(struct amdgpu_xcp_mgr *xcp_mgr,
@@ -278,3 +306,32 @@ int amdgpu_xcp_get_inst_details(struct amdgpu_xcp *xcp,
 
        return 0;
 }
+
+int amdgpu_xcp_dev_register(struct amdgpu_device *adev,
+                       const struct pci_device_id *ent)
+{
+       int i, ret;
+
+       if (!adev->xcp_mgr)
+               return 0;
+
+       for (i = 0; i < MAX_XCP; i++) {
+               ret = drm_dev_register(adev->xcp_mgr->xcp[i].ddev, ent->driver_data);
+               if (ret)
+                       return ret;
+       }
+
+       return 0;
+}
+
+void amdgpu_xcp_dev_unplug(struct amdgpu_device *adev)
+{
+       int i;
+
+       if (!adev->xcp_mgr)
+               return;
+
+       for (i = 0; i < MAX_XCP; i++)
+               drm_dev_unplug(adev->xcp_mgr->xcp[i].ddev);
+}
+
index e1319b887bf3ea1a972c746c72c751ae7c0e1e88..dad0b98d1ae7c79bcc4d553a13802158682223bd 100644 (file)
@@ -70,6 +70,7 @@ struct amdgpu_xcp {
        uint8_t id;
        uint8_t mem_id;
        bool valid;
+       struct drm_device *ddev;
 };
 
 struct amdgpu_xcp_mgr {
@@ -115,6 +116,10 @@ int amdgpu_xcp_get_inst_details(struct amdgpu_xcp *xcp,
                                enum AMDGPU_XCP_IP_BLOCK ip,
                                uint32_t *inst_mask);
 
+int amdgpu_xcp_dev_register(struct amdgpu_device *adev,
+                               const struct pci_device_id *ent);
+void amdgpu_xcp_dev_unplug(struct amdgpu_device *adev);
+
 static inline int amdgpu_xcp_get_num_xcp(struct amdgpu_xcp_mgr *xcp_mgr)
 {
        if (!xcp_mgr)