drm/amdgpu/display: remove VEGAM config option
authorAlex Deucher <alexander.deucher@amd.com>
Wed, 16 May 2018 13:39:58 +0000 (08:39 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 18 May 2018 21:08:18 +0000 (16:08 -0500)
Leftover from bringup.  No need to keep it around for
upstream.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
13 files changed:
drivers/gpu/drm/amd/display/Kconfig
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
drivers/gpu/drm/amd/display/dc/bios/command_table_helper.c
drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.c
drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
drivers/gpu/drm/amd/display/dc/gpio/hw_factory.c
drivers/gpu/drm/amd/display/dc/gpio/hw_translate.c
drivers/gpu/drm/amd/display/dc/i2caux/i2caux.c
drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h
drivers/gpu/drm/amd/display/include/dal_asic_id.h
drivers/gpu/drm/amd/display/include/dal_types.h

index 6dcec9c9126b030168e53ef08505418d851a167b..a0eef59e65ba70dd0b14a13be9fef817720f149d 100644 (file)
@@ -34,13 +34,6 @@ config DEBUG_KERNEL_DC
          if you want to hit
          kdgb_break in assert.
 
-config DRM_AMD_DC_VEGAM
-        bool "VEGAM support"
-        depends on DRM_AMD_DC
-        help
-         Choose this option if you want to have
-         VEGAM support for display engine
-
 config DRM_AMD_DC_VG20
        bool "Vega20 support"
        depends on DRM_AMD_DC
index 6f5cb26b243cde5b780d1b69e1d09480a2e7b3d3..6d0dc1fecb39746fea34b76abfa0c69716250d12 100644 (file)
@@ -1514,9 +1514,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
        case CHIP_POLARIS11:
        case CHIP_POLARIS10:
        case CHIP_POLARIS12:
-#if defined(CONFIG_DRM_AMD_DC_VEGAM)
        case CHIP_VEGAM:
-#endif
        case CHIP_VEGA10:
        case CHIP_VEGA12:
        case CHIP_VEGA20:
@@ -1710,9 +1708,7 @@ static int dm_early_init(void *handle)
                adev->mode_info.plane_type = dm_plane_type_default;
                break;
        case CHIP_POLARIS10:
-#if defined(CONFIG_DRM_AMD_DC_VEGAM)
        case CHIP_VEGAM:
-#endif
                adev->mode_info.num_crtc = 6;
                adev->mode_info.num_hpd = 6;
                adev->mode_info.num_dig = 6;
index be066c49b984b63af7a789e536641e94e707cefd..253bbb1eea6095bfa3e576d6e9b25016bf83c62e 100644 (file)
@@ -51,9 +51,7 @@ bool dal_bios_parser_init_cmd_tbl_helper(
                return true;
 
        case DCE_VERSION_11_2:
-#if defined(CONFIG_DRM_AMD_DC_VEGAM)
        case DCE_VERSION_11_22:
-#endif
                *h = dal_cmd_tbl_helper_dce112_get_table();
                return true;
 
index 9b9e06995805ced525acfe10e420816923c1e76a..bbbcef566c551908d42c0c6fda57083c1bdd455e 100644 (file)
@@ -52,9 +52,7 @@ bool dal_bios_parser_init_cmd_tbl_helper2(
                return true;
 
        case DCE_VERSION_11_2:
-#if defined(CONFIG_DRM_AMD_DC_VEGAM)
        case DCE_VERSION_11_22:
-#endif
                *h = dal_cmd_tbl_helper_dce112_get_table2();
                return true;
 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
index 4ee3c26f7c13c504a91ea40d07c384fb36723318..2c4e8f0cb2dcdb7fedbf133b8121bcfd55085edf 100644 (file)
@@ -59,10 +59,8 @@ static enum bw_calcs_version bw_calcs_version_from_asic_id(struct hw_asic_id asi
                        return BW_CALCS_VERSION_POLARIS10;
                if (ASIC_REV_IS_POLARIS11_M(asic_id.hw_internal_rev))
                        return BW_CALCS_VERSION_POLARIS11;
-#if defined(CONFIG_DRM_AMD_DC_VEGAM)
                if (ASIC_REV_IS_VEGAM(asic_id.hw_internal_rev))
                        return BW_CALCS_VERSION_VEGAM;
-#endif
                return BW_CALCS_VERSION_INVALID;
 
        case FAMILY_AI:
@@ -2151,11 +2149,9 @@ void bw_calcs_init(struct bw_calcs_dceip *bw_dceip,
                dceip.mcifwr_all_surfaces_burst_time = bw_int_to_fixed(0); /* todo: this is a bug*/
                break;
        case BW_CALCS_VERSION_POLARIS10:
-#if defined(CONFIG_DRM_AMD_DC_VEGAM)
                /* TODO: Treat VEGAM the same as P10 for now
                 * Need to tune the para for VEGAM if needed */
        case BW_CALCS_VERSION_VEGAM:
-#endif
                vbios.memory_type = bw_def_gddr5;
                vbios.dram_channel_width_in_bits = 32;
                vbios.number_of_dram_channels = asic_id.vram_width / vbios.dram_channel_width_in_bits;
index 9eb731fb5251c37467f1af2799f39029b12227ae..345835ff58d13af9803546e4b87269472542b523 100644 (file)
@@ -79,10 +79,8 @@ enum dce_version resource_parse_asic_id(struct hw_asic_id asic_id)
                                ASIC_REV_IS_POLARIS12_V(asic_id.hw_internal_rev)) {
                        dc_version = DCE_VERSION_11_2;
                }
-#if defined(CONFIG_DRM_AMD_DC_VEGAM)
                if (ASIC_REV_IS_VEGAM(asic_id.hw_internal_rev))
                        dc_version = DCE_VERSION_11_22;
-#endif
                break;
        case FAMILY_AI:
                dc_version = DCE_VERSION_12_0;
@@ -129,9 +127,7 @@ struct resource_pool *dc_create_resource_pool(
                        num_virtual_links, dc, asic_id);
                break;
        case DCE_VERSION_11_2:
-#if defined(CONFIG_DRM_AMD_DC_VEGAM)
        case DCE_VERSION_11_22:
-#endif
                res_pool = dce112_create_resource_pool(
                        num_virtual_links, dc);
                break;
index 223db98a568a715a618a5327ad7f74a531258e31..0570e7e4d0a086e037841a0222b9562d7fe554c4 100644 (file)
@@ -590,9 +590,7 @@ static uint32_t dce110_get_pix_clk_dividers(
                        pll_settings, pix_clk_params);
                break;
        case DCE_VERSION_11_2:
-#if defined(CONFIG_DRM_AMD_DC_VEGAM)
        case DCE_VERSION_11_22:
-#endif
        case DCE_VERSION_12_0:
 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
        case DCN_VERSION_1_0:
@@ -982,9 +980,7 @@ static bool dce110_program_pix_clk(
 
                break;
        case DCE_VERSION_11_2:
-#if defined(CONFIG_DRM_AMD_DC_VEGAM)
        case DCE_VERSION_11_22:
-#endif
        case DCE_VERSION_12_0:
 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
        case DCN_VERSION_1_0:
index 61fe484da1a0080e453ccb2f44cb99426795b75e..0caee3523017fe74e45a217e604cd57004a64486 100644 (file)
@@ -75,9 +75,7 @@ bool dal_hw_factory_init(
                return true;
        case DCE_VERSION_11_0:
        case DCE_VERSION_11_2:
-#if defined(CONFIG_DRM_AMD_DC_VEGAM)
        case DCE_VERSION_11_22:
-#endif
                dal_hw_factory_dce110_init(factory);
                return true;
        case DCE_VERSION_12_0:
index 910ae2b7bf6426e175a29b784e182ac3ac9b90e5..55c7074885413e8ebba1ce2ccc886f6586850c87 100644 (file)
@@ -72,9 +72,7 @@ bool dal_hw_translate_init(
        case DCE_VERSION_10_0:
        case DCE_VERSION_11_0:
        case DCE_VERSION_11_2:
-#if defined(CONFIG_DRM_AMD_DC_VEGAM)
        case DCE_VERSION_11_22:
-#endif
                dal_hw_translate_dce110_init(translate);
                return true;
        case DCE_VERSION_12_0:
index c3d7c320fdba92bfc9cc2d77ef8e1856b6ea06d3..14dc8c94d862b049f7c5f7b760d91e201be8ac37 100644 (file)
@@ -83,9 +83,7 @@ struct i2caux *dal_i2caux_create(
        case DCE_VERSION_8_3:
                return dal_i2caux_dce80_create(ctx);
        case DCE_VERSION_11_2:
-#if defined(CONFIG_DRM_AMD_DC_VEGAM)
        case DCE_VERSION_11_22:
-#endif
                return dal_i2caux_dce112_create(ctx);
        case DCE_VERSION_11_0:
                return dal_i2caux_dce110_create(ctx);
index 933ea7a1e18bede7be678556eb971914c38bc1ed..eece165206f9e3761876a5366d6b376624e3840a 100644 (file)
@@ -43,9 +43,7 @@ enum bw_calcs_version {
        BW_CALCS_VERSION_POLARIS10,
        BW_CALCS_VERSION_POLARIS11,
        BW_CALCS_VERSION_POLARIS12,
-#if defined(CONFIG_DRM_AMD_DC_VEGAM)
        BW_CALCS_VERSION_VEGAM,
-#endif
        BW_CALCS_VERSION_STONEY,
        BW_CALCS_VERSION_VEGA10
 };
index 77d2856be9f62c7ce3451b80c8993cf8b3e02abf..6aeb5a2902c303a9f3498cdc9bf630a38428e1d5 100644 (file)
@@ -86,6 +86,7 @@
 #define VI_POLARIS10_P_A0 80
 #define VI_POLARIS11_M_A0 90
 #define VI_POLARIS12_V_A0 100
+#define VI_VEGAM_A0 110
 
 #define VI_UNKNOWN 0xFF
 
                (eChipRev < VI_POLARIS11_M_A0))
 #define ASIC_REV_IS_POLARIS11_M(eChipRev) ((eChipRev >= VI_POLARIS11_M_A0) &&  \
                (eChipRev < VI_POLARIS12_V_A0))
-#if defined(CONFIG_DRM_AMD_DC_VEGAM)
-#define VI_VEGAM_A0 110
 #define ASIC_REV_IS_POLARIS12_V(eChipRev) ((eChipRev >= VI_POLARIS12_V_A0) && \
                (eChipRev < VI_VEGAM_A0))
 #define ASIC_REV_IS_VEGAM(eChipRev) (eChipRev >= VI_VEGAM_A0)
-#else
-#define ASIC_REV_IS_POLARIS12_V(eChipRev) (eChipRev >= VI_POLARIS12_V_A0)
-#endif
 
 /* DCE11 */
 #define CZ_CARRIZO_A0 0x01
index 5b1f8cef0c229c2a228bc2ce59a12358a04f7be7..840142b65f8b0086c9d63d08106eb412d4f8b6a5 100644 (file)
@@ -40,9 +40,7 @@ enum dce_version {
        DCE_VERSION_10_0,
        DCE_VERSION_11_0,
        DCE_VERSION_11_2,
-#if defined(CONFIG_DRM_AMD_DC_VEGAM)
        DCE_VERSION_11_22,
-#endif
        DCE_VERSION_12_0,
        DCE_VERSION_MAX,
        DCN_VERSION_1_0,