if (!ia64_platform_is("hpzx1") && !ia64_platform_is("hpzx1_swiotlb"))
return 0;
-#if defined(CONFIG_IA64_GENERIC) && defined(CONFIG_CRASH_DUMP)
+#if defined(CONFIG_IA64_GENERIC) && defined(CONFIG_CRASH_DUMP) && \
+ defined(CONFIG_PROC_FS)
/* If we are booting a kdump kernel, the sba_iommu will
* cause devices that were not shutdown properly to MCA
* as soon as they are turned back on. Our only option for
extern unsigned long *ia32_gdt;
extern struct page *ia32_gate_page;
-struct page *
-ia32_install_shared_page (struct vm_area_struct *vma, unsigned long address, int *type)
+int
+ia32_install_shared_page (struct vm_area_struct *vma, struct vm_fault *vmf)
{
- struct page *pg = ia32_shared_page[smp_processor_id()];
- get_page(pg);
- if (type)
- *type = VM_FAULT_MINOR;
- return pg;
+ vmf->page = ia32_shared_page[smp_processor_id()];
+ get_page(vmf->page);
+ return 0;
}
-struct page *
-ia32_install_gate_page (struct vm_area_struct *vma, unsigned long address, int *type)
+int
+ia32_install_gate_page (struct vm_area_struct *vma, struct vm_fault *vmf)
{
- struct page *pg = ia32_gate_page;
- get_page(pg);
- if (type)
- *type = VM_FAULT_MINOR;
- return pg;
+ vmf->page = ia32_gate_page;
+ get_page(vmf->page);
+ return 0;
}
static struct vm_operations_struct ia32_shared_page_vm_ops = {
- .nopage = ia32_install_shared_page
+ .fault = ia32_install_shared_page
};
static struct vm_operations_struct ia32_gate_page_vm_ops = {
- .nopage = ia32_install_gate_page
+ .fault = ia32_install_gate_page
};
void
RESTORE_REG(cr.dcr, r25, r17);;
RESTORE_REG(cr.iva, r25, r17);;
RESTORE_REG(cr.pta, r25, r17);;
+ srlz.d;; // required not to violate RAW dependency
RESTORE_REG(cr.itv, r25, r17);;
RESTORE_REG(cr.pmv, r25, r17);;
RESTORE_REG(cr.cmcv, r25, r17);;
{
unsigned long flags;
int vector, cpu;
- cpumask_t domain;
+ cpumask_t domain = CPU_MASK_NONE;
vector = -ENOSPC;
{
unsigned long flags;
int irq, vector, cpu;
- cpumask_t domain;
+ cpumask_t domain = CPU_MASK_NONE;
irq = vector = -ENOSPC;
spin_lock_irqsave(&vector_lock, flags);
#include <linux/workqueue.h>
#include <linux/cpumask.h>
#include <linux/kdebug.h>
+#include <linux/cpu.h>
#include <asm/delay.h>
#include <asm/machvec.h>
PAGE_KERNEL));
}
+static void __cpuinit ia64_mca_cmc_vector_adjust(void *dummy)
+{
+ unsigned long flags;
+
+ local_irq_save(flags);
+ if (!cmc_polling_enabled)
+ ia64_mca_cmc_vector_enable(NULL);
+ local_irq_restore(flags);
+}
+
+static int __cpuinit mca_cpu_callback(struct notifier_block *nfb,
+ unsigned long action,
+ void *hcpu)
+{
+ int hotcpu = (unsigned long) hcpu;
+
+ switch (action) {
+ case CPU_ONLINE:
+ case CPU_ONLINE_FROZEN:
+ smp_call_function_single(hotcpu, ia64_mca_cmc_vector_adjust,
+ NULL, 1, 0);
+ break;
+ }
+ return NOTIFY_OK;
+}
+
+static struct notifier_block mca_cpu_notifier __cpuinitdata = {
+ .notifier_call = mca_cpu_callback
+};
+
/*
* ia64_mca_init
*
if (!mca_init)
return 0;
+ register_hotcpu_notifier(&mca_cpu_notifier);
+
/* Setup the CMCI/P vector and handler */
init_timer(&cmc_poll_timer);
cmc_poll_timer.function = ia64_mca_cmc_poll;
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/kdebug.h>
+#include <linux/utsname.h>
#include <asm/cpu.h>
#include <asm/delay.h>
print_modules();
printk("\nPid: %d, CPU %d, comm: %20s\n", task_pid_nr(current),
smp_processor_id(), current->comm);
- printk("psr : %016lx ifs : %016lx ip : [<%016lx>] %s\n",
- regs->cr_ipsr, regs->cr_ifs, ip, print_tainted());
+ printk("psr : %016lx ifs : %016lx ip : [<%016lx>] %s (%s)\n",
+ regs->cr_ipsr, regs->cr_ifs, ip, print_tainted(),
+ init_utsname()->release);
print_symbol("ip is at %s\n", ip);
printk("unat: %016lx pfs : %016lx rsc : %016lx\n",
regs->ar_unat, regs->ar_pfs, regs->ar_rsc);
ia32_drop_ia64_partial_page_list(current);
current->thread.task_size = IA32_PAGE_OFFSET;
set_fs(USER_DS);
+ memset(current->thread.tls_array, 0, sizeof(current->thread.tls_array));
}
#endif
}
err |= __copy_to_user(&sc->sc_gr[15], &scr->pt.r15, 8); /* r15 */
err |= __put_user(scr->pt.cr_iip + ia64_psr(&scr->pt)->ri, &sc->sc_ip);
- if (flags & IA64_SC_FLAG_IN_SYSCALL) {
- /* Clear scratch registers if the signal interrupted a system call. */
- err |= __put_user(0, &sc->sc_ar_ccv); /* ar.ccv */
- err |= __put_user(0, &sc->sc_br[7]); /* b7 */
- err |= __put_user(0, &sc->sc_gr[14]); /* r14 */
- err |= __clear_user(&sc->sc_ar25, 2*8); /* ar.csd & ar.ssd */
- err |= __clear_user(&sc->sc_gr[2], 2*8); /* r2-r3 */
- err |= __clear_user(&sc->sc_gr[16], 16*8); /* r16-r31 */
- } else {
+ if (!(flags & IA64_SC_FLAG_IN_SYSCALL)) {
/* Copy scratch regs to sigcontext if the signal didn't interrupt a syscall. */
err |= __put_user(scr->pt.ar_ccv, &sc->sc_ar_ccv); /* ar.ccv */
err |= __put_user(scr->pt.b7, &sc->sc_br[7]); /* b7 */
for (i = 0; i < (IA64_GRANULE_SIZE / PAGE_SIZE); i++)
SetPageUncached(&page[i]);
- flush_tlb_kernel_range(uc_addr, uc_adddr + IA64_GRANULE_SIZE);
+ flush_tlb_kernel_range(uc_addr, uc_addr + IA64_GRANULE_SIZE);
status = ia64_pal_prefetch_visibility(PAL_VISIBILITY_PHYSICAL);
if (status == PAL_VISIBILITY_OK_REMOTE_NEEDED) {
* IPI based ptc implementation and A-step IPI implementation.
* Rohit Seth <rohit.seth@intel.com>
* Ken Chen <kenneth.w.chen@intel.com>
+ * Christophe de Dinechin <ddd@hp.com>: Avoid ptc.e on memory allocation
*/
#include <linux/module.h>
#include <linux/init.h>
{
static DEFINE_SPINLOCK(ptcg_lock);
- if (mm != current->active_mm || !current->mm) {
- flush_tlb_all();
- return;
+ struct mm_struct *active_mm = current->active_mm;
+
+ if (mm != active_mm) {
+ /* Restore region IDs for mm */
+ if (mm && active_mm) {
+ activate_context(mm);
+ } else {
+ flush_tlb_all();
+ return;
+ }
}
/* HW requires global serialization of ptc.ga. */
} while (start < end);
}
spin_unlock(&ptcg_lock);
+
+ if (mm != active_mm) {
+ activate_context(active_mm);
+ }
}
void
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (c) 2000-2006 Silicon Graphics, Inc. All Rights Reserved.
+ * Copyright (c) 2000-2007 Silicon Graphics, Inc. All Rights Reserved.
*/
#include <linux/module.h>
BTE_LNSTAT_LOAD(bte), *bte->most_rcnt_na));
if (transfer_stat & IBLS_ERROR) {
- bte_status = transfer_stat & ~IBLS_ERROR;
+ bte_status = BTE_GET_ERROR_STATUS(transfer_stat);
} else {
bte_status = BTE_SUCCESS;
}
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (c) 2000-2005 Silicon Graphics, Inc. All Rights Reserved.
+ * Copyright (c) 2000-2007 Silicon Graphics, Inc. All Rights Reserved.
*/
#include <linux/types.h>
for (i = 0; i < BTES_PER_NODE; i++) {
bte = &err_nodepda->bte_if[i];
status = BTE_LNSTAT_LOAD(bte);
- if ((status & IBLS_ERROR) || !(status & IBLS_BUSY))
+ if (status & IBLS_ERROR) {
+ bte->bh_error = BTE_SHUB2_ERROR(status);
+ continue;
+ }
+ if (!(status & IBLS_BUSY))
continue;
mod_timer(recovery_timer, jiffies + (HZ * 5));
BTE_PRINTK(("eh:%p:%d Marked Giving up\n", err_nodepda,
* } else
* do desired mmr access
*
- * According to hw, we can use reads instead of writes to the above addres
+ * According to hw, we can use reads instead of writes to the above address
*
* Note this WAR can only to be used for accessing internal MMR's in the
* TIOCE Coretalk Address Range 0x0 - 0x07ff_ffff. This includes the
/**
* setup_local_APIC - setup the local APIC
*/
-void __devinit setup_local_APIC(void)
+void __cpuinit setup_local_APIC(void)
{
unsigned long oldvalue, value, maxlvt, integrated;
int i, j;
static int __init timer_irq_works(void)
{
unsigned long t1 = jiffies;
+ unsigned long flags;
if (no_timer_check)
return 1;
+ local_save_flags(flags);
local_irq_enable();
/* Let ten ticks pass... */
mdelay((10 * 1000) / HZ);
+ local_irq_restore(flags);
/*
* Expect a few ticks at least, to be sure some possible
int apic1, pin1, apic2, pin2;
int vector;
unsigned int ver;
+ unsigned long flags;
+
+ local_irq_save(flags);
ver = apic_read(APIC_LVR);
ver = GET_APIC_VERSION(ver);
}
if (disable_timer_pin_1 > 0)
clear_IO_APIC_pin(0, pin1);
- return;
+ goto out;
}
clear_IO_APIC_pin(apic1, pin1);
printk(KERN_ERR "..MP-BIOS bug: 8254 timer not connected to "
if (nmi_watchdog == NMI_IO_APIC) {
setup_nmi();
}
- return;
+ goto out;
}
/*
* Cleanup, just in case ...
if (timer_irq_works()) {
printk(" works.\n");
- return;
+ goto out;
}
apic_write_around(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | vector);
printk(" failed.\n");
if (timer_irq_works()) {
printk(" works.\n");
- return;
+ goto out;
}
printk(" failed :(.\n");
panic("IO-APIC + timer doesn't work! Boot with apic=debug and send a "
"report. Then try booting with the 'noapic' option");
+out:
+ local_irq_restore(flags);
}
/*
static int __init timer_irq_works(void)
{
unsigned long t1 = jiffies;
+ unsigned long flags;
+ local_save_flags(flags);
local_irq_enable();
/* Let ten ticks pass... */
mdelay((10 * 1000) / HZ);
+ local_irq_restore(flags);
/*
* Expect a few ticks at least, to be sure some possible
{
struct irq_cfg *cfg = irq_cfg + 0;
int apic1, pin1, apic2, pin2;
+ unsigned long flags;
+
+ local_irq_save(flags);
/*
* get/set the timer IRQ vector:
}
if (disable_timer_pin_1 > 0)
clear_IO_APIC_pin(0, pin1);
- return;
+ goto out;
}
clear_IO_APIC_pin(apic1, pin1);
apic_printk(APIC_QUIET,KERN_ERR "..MP-BIOS bug: 8254 timer not "
if (nmi_watchdog == NMI_IO_APIC) {
setup_nmi();
}
- return;
+ goto out;
}
/*
* Cleanup, just in case ...
if (timer_irq_works()) {
apic_printk(APIC_VERBOSE," works.\n");
- return;
+ goto out;
}
apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | cfg->vector);
apic_printk(APIC_VERBOSE," failed.\n");
if (timer_irq_works()) {
apic_printk(APIC_VERBOSE," works.\n");
- return;
+ goto out;
}
apic_printk(APIC_VERBOSE," failed :(.\n");
panic("IO-APIC + timer doesn't work! Try using the 'noapic' kernel parameter\n");
+out:
+ local_irq_restore(flags);
}
static int __init notimercheck(char *s)
if ((addr > (u8 *) jprobe_return) && (addr < (u8 *) jprobe_return_end)) {
if (®s->esp != kcb->jprobe_saved_esp) {
- struct pt_regs *saved_regs =
- container_of(kcb->jprobe_saved_esp,
- struct pt_regs, esp);
+ struct pt_regs *saved_regs = &kcb->jprobe_saved_regs;
printk("current esp %p does not match saved esp %p\n",
®s->esp, kcb->jprobe_saved_esp);
printk("Saved registers for jprobe %p\n", jp);
struct pt_regs *regs, struct kprobe_ctlblk *kcb)
{
unsigned long *tos = (unsigned long *)regs->rsp;
- unsigned long next_rip = 0;
unsigned long copy_rip = (unsigned long)p->ainsn.insn;
unsigned long orig_rip = (unsigned long)p->addr;
kprobe_opcode_t *insn = p->ainsn.insn;
if (*insn >= 0x40 && *insn <= 0x4f)
insn++;
+ regs->eflags &= ~TF_MASK;
switch (*insn) {
- case 0x9c: /* pushfl */
+ case 0x9c: /* pushfl */
*tos &= ~(TF_MASK | IF_MASK);
*tos |= kcb->kprobe_old_rflags;
break;
- case 0xc3: /* ret/lret */
- case 0xcb:
- case 0xc2:
+ case 0xc2: /* iret/ret/lret */
+ case 0xc3:
case 0xca:
- regs->eflags &= ~TF_MASK;
- /* rip is already adjusted, no more changes required*/
- return;
- case 0xe8: /* call relative - Fix return addr */
+ case 0xcb:
+ case 0xcf:
+ case 0xea: /* jmp absolute -- ip is correct */
+ /* ip is already adjusted, no more changes required */
+ goto no_change;
+ case 0xe8: /* call relative - Fix return addr */
*tos = orig_rip + (*tos - copy_rip);
break;
case 0xff:
if ((insn[1] & 0x30) == 0x10) {
/* call absolute, indirect */
- /* Fix return addr; rip is correct. */
- next_rip = regs->rip;
+ /* Fix return addr; ip is correct. */
*tos = orig_rip + (*tos - copy_rip);
+ goto no_change;
} else if (((insn[1] & 0x31) == 0x20) || /* jmp near, absolute indirect */
((insn[1] & 0x31) == 0x21)) { /* jmp far, absolute indirect */
- /* rip is correct. */
- next_rip = regs->rip;
+ /* ip is correct. */
+ goto no_change;
}
- break;
- case 0xea: /* jmp absolute -- rip is correct */
- next_rip = regs->rip;
- break;
default:
break;
}
- regs->eflags &= ~TF_MASK;
- if (next_rip) {
- regs->rip = next_rip;
- } else {
- regs->rip = orig_rip + (regs->rip - copy_rip);
- }
+ regs->rip = orig_rip + (regs->rip - copy_rip);
+no_change:
+
+ return;
}
int __kprobes post_kprobe_handler(struct pt_regs *regs)
struct jprobe *jp = container_of(p, struct jprobe, kp);
if ((addr > (u8 *) jprobe_return) && (addr < (u8 *) jprobe_return_end)) {
- if ((long *)regs->rsp != kcb->jprobe_saved_rsp) {
- struct pt_regs *saved_regs =
- container_of(kcb->jprobe_saved_rsp,
- struct pt_regs, rsp);
+ if ((unsigned long *)regs->rsp != kcb->jprobe_saved_rsp) {
+ struct pt_regs *saved_regs = &kcb->jprobe_saved_regs;
printk("current rsp %p does not match saved rsp %p\n",
(long *)regs->rsp, kcb->jprobe_saved_rsp);
printk("Saved registers for jprobe %p\n", jp);
mwait_idle_with_hints(0, 0);
}
-void __devinit select_idle_routine(const struct cpuinfo_x86 *c)
+void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
{
if (cpu_has(c, X86_FEATURE_MWAIT)) {
printk("monitor/mwait feature present.\n");
address, and must not be in the .bss segment! */
unsigned long init_pg_tables_end __initdata = ~0UL;
-int disable_pse __devinitdata = 0;
+int disable_pse __cpuinitdata = 0;
/*
* Machine setup..
#include <asm/mtrr.h>
/* Set if we find a B stepping CPU */
-static int __devinitdata smp_b_stepping;
+static int __cpuinitdata smp_b_stepping;
/* Number of siblings per CPU package */
int smp_num_siblings = 1;
}
#ifdef CONFIG_HOTPLUG_CPU
-static struct task_struct * __devinitdata cpu_idle_tasks[NR_CPUS];
-static inline struct task_struct * alloc_idle_task(int cpu)
+static struct task_struct * __cpuinitdata cpu_idle_tasks[NR_CPUS];
+static inline struct task_struct * __cpuinit alloc_idle_task(int cpu)
{
struct task_struct *idle;
struct cpuinfo_x86 *c = &cpu_data(id);
*c = boot_cpu_data;
- c->cpu_index = id;
identify_cpu(c);
+ c->cpu_index = id;
print_cpu_info(c);
}
/**
* @file op_model_athlon.h
- * athlon / K7 model-specific MSR operations
+ * athlon / K7 / K8 / Family 10h model-specific MSR operations
*
* @remark Copyright 2002 OProfile authors
* @remark Read the file COPYING
#define CTRL_WRITE(l,h,msrs,c) do {wrmsr(msrs->controls[(c)].addr, (l), (h));} while (0)
#define CTRL_SET_ACTIVE(n) (n |= (1<<22))
#define CTRL_SET_INACTIVE(n) (n &= ~(1<<22))
-#define CTRL_CLEAR(x) (x &= (1<<21))
+#define CTRL_CLEAR_LO(x) (x &= (1<<21))
+#define CTRL_CLEAR_HI(x) (x &= 0xfffffcf0)
#define CTRL_SET_ENABLE(val) (val |= 1<<20)
#define CTRL_SET_USR(val,u) (val |= ((u & 1) << 16))
#define CTRL_SET_KERN(val,k) (val |= ((k & 1) << 17))
#define CTRL_SET_UM(val, m) (val |= (m << 8))
-#define CTRL_SET_EVENT(val, e) (val |= e)
+#define CTRL_SET_EVENT_LOW(val, e) (val |= (e & 0xff))
+#define CTRL_SET_EVENT_HIGH(val, e) (val |= ((e >> 8) & 0xf))
+#define CTRL_SET_HOST_ONLY(val, h) (val |= ((h & 1) << 9))
+#define CTRL_SET_GUEST_ONLY(val, h) (val |= ((h & 1) << 8))
static unsigned long reset_value[NUM_COUNTERS];
if (unlikely(!CTRL_IS_RESERVED(msrs,i)))
continue;
CTRL_READ(low, high, msrs, i);
- CTRL_CLEAR(low);
+ CTRL_CLEAR_LO(low);
+ CTRL_CLEAR_HI(high);
CTRL_WRITE(low, high, msrs, i);
}
CTR_WRITE(counter_config[i].count, msrs, i);
CTRL_READ(low, high, msrs, i);
- CTRL_CLEAR(low);
+ CTRL_CLEAR_LO(low);
+ CTRL_CLEAR_HI(high);
CTRL_SET_ENABLE(low);
CTRL_SET_USR(low, counter_config[i].user);
CTRL_SET_KERN(low, counter_config[i].kernel);
CTRL_SET_UM(low, counter_config[i].unit_mask);
- CTRL_SET_EVENT(low, counter_config[i].event);
+ CTRL_SET_EVENT_LOW(low, counter_config[i].event);
+ CTRL_SET_EVENT_HIGH(high, counter_config[i].event);
+ CTRL_SET_HOST_ONLY(high, 0);
+ CTRL_SET_GUEST_ONLY(high, 0);
+
CTRL_WRITE(low, high, msrs, i);
} else {
reset_value[i] = 0;
}
/*
- * as_fifo_expired returns 0 if there are no expired reads on the fifo,
+ * as_fifo_expired returns 0 if there are no expired requests on the fifo,
* 1 otherwise. It is ratelimited so that we only perform the check once per
* `fifo_expire' interval. Otherwise a large number of expired requests
* would create a hopeless seekstorm.
ad->batch_data_dir = REQ_ASYNC;
ad->current_write_count = ad->write_batch_count;
ad->write_batch_idled = 0;
- rq = ad->next_rq[ad->batch_data_dir];
+ rq = rq_entry_fifo(ad->fifo_list[REQ_ASYNC].next);
+ ad->last_check_fifo[REQ_ASYNC] = jiffies;
goto dispatch_request;
}
as_add_rq_rb(ad, rq);
/*
- * set expire time (only used for reads) and add to fifo list
+ * set expire time and add to fifo list
*/
rq_set_fifo_time(rq, jiffies + ad->fifo_expire[data_dir]);
list_add_tail(&rq->queuelist, &ad->fifo_list[data_dir]);
static int __init as_init(void)
{
- return elv_register(&iosched_as);
+ elv_register(&iosched_as);
+
+ return 0;
}
static void __exit as_exit(void)
static int __init cfq_init(void)
{
- int ret;
-
/*
* could be 0 on HZ < 1000 setups
*/
if (cfq_slab_setup())
return -ENOMEM;
- ret = elv_register(&iosched_cfq);
- if (ret)
- cfq_slab_kill();
+ elv_register(&iosched_cfq);
- return ret;
+ return 0;
}
static void __exit cfq_exit(void)
static int __init deadline_init(void)
{
- return elv_register(&iosched_deadline);
+ elv_register(&iosched_deadline);
+
+ return 0;
}
static void __exit deadline_exit(void)
__elv_unregister_queue(q->elevator);
}
-int elv_register(struct elevator_type *e)
+void elv_register(struct elevator_type *e)
{
char *def = "";
def = " (default)";
printk(KERN_INFO "io scheduler %s registered%s\n", e->elevator_name, def);
- return 0;
}
EXPORT_SYMBOL_GPL(elv_register);
static int __init noop_init(void)
{
- return elv_register(&elevator_noop);
+ elv_register(&elevator_noop);
+
+ return 0;
}
static void __exit noop_exit(void)
rq->cmd_len = hdr->cmd_len;
rq->cmd_type = REQ_TYPE_BLOCK_PC;
- rq->timeout = (hdr->timeout * HZ) / 1000;
+ rq->timeout = msecs_to_jiffies(hdr->timeout);
if (!rq->timeout)
rq->timeout = q->sg_timeout;
if (!rq->timeout)
*/
blk_execute_rq(q, bd_disk, rq, 0);
- hdr->duration = ((jiffies - start_time) * 1000) / HZ;
+ hdr->duration = jiffies_to_msecs(jiffies - start_time);
return blk_complete_sghdr_rq(rq, hdr, bio);
out:
pci_write_config_word(pdev, mcrbase + 2, mcr3 | 0x8000);
pci_read_config_byte(pdev, 0x5A, &ata66);
/* Reset TCBLID/FCBLID to output */
- pci_write_config_word(pdev, 0x52, mcr3);
+ pci_write_config_word(pdev, mcrbase + 2, mcr3);
if (ata66 & (2 >> ap->port_no))
ap->cbl = ATA_CBL_PATA40;
* - set initialised bit then.
*/
-//#define DEBUG /* uncomment if you want debugging info (pr_debug) */
+#undef DEBUG /* #define DEBUG if you want debugging info (pr_debug) */
#include <linux/fs.h>
#include <linux/bio.h>
#include <linux/kernel.h>
static struct block_device_operations mm_fops;
static struct timer_list battery_timer;
-static int num_cards = 0;
+static int num_cards;
static struct gendisk *mm_gendisk[MM_MAXCARDS];
static void check_batteries(struct cardinfo *card);
-/*
------------------------------------------------------------------------------------
--- get_userbit
------------------------------------------------------------------------------------
-*/
static int get_userbit(struct cardinfo *card, int bit)
{
unsigned char led;
led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
return led & bit;
}
-/*
------------------------------------------------------------------------------------
--- set_userbit
------------------------------------------------------------------------------------
-*/
+
static int set_userbit(struct cardinfo *card, int bit, unsigned char state)
{
unsigned char led;
return 0;
}
-/*
------------------------------------------------------------------------------------
--- set_led
------------------------------------------------------------------------------------
-*/
+
/*
* NOTE: For the power LED, use the LED_POWER_* macros since they differ
*/
}
#ifdef MM_DIAG
-/*
------------------------------------------------------------------------------------
--- dump_regs
------------------------------------------------------------------------------------
-*/
static void dump_regs(struct cardinfo *card)
{
unsigned char *p;
}
}
#endif
-/*
------------------------------------------------------------------------------------
--- dump_dmastat
------------------------------------------------------------------------------------
-*/
+
static void dump_dmastat(struct cardinfo *card, unsigned int dmastat)
{
dev_printk(KERN_DEBUG, &card->dev->dev, "DMAstat - ");
if (dmastat & DMASCR_ANY_ERR)
- printk("ANY_ERR ");
+ printk(KERN_CONT "ANY_ERR ");
if (dmastat & DMASCR_MBE_ERR)
- printk("MBE_ERR ");
+ printk(KERN_CONT "MBE_ERR ");
if (dmastat & DMASCR_PARITY_ERR_REP)
- printk("PARITY_ERR_REP ");
+ printk(KERN_CONT "PARITY_ERR_REP ");
if (dmastat & DMASCR_PARITY_ERR_DET)
- printk("PARITY_ERR_DET ");
+ printk(KERN_CONT "PARITY_ERR_DET ");
if (dmastat & DMASCR_SYSTEM_ERR_SIG)
- printk("SYSTEM_ERR_SIG ");
+ printk(KERN_CONT "SYSTEM_ERR_SIG ");
if (dmastat & DMASCR_TARGET_ABT)
- printk("TARGET_ABT ");
+ printk(KERN_CONT "TARGET_ABT ");
if (dmastat & DMASCR_MASTER_ABT)
- printk("MASTER_ABT ");
+ printk(KERN_CONT "MASTER_ABT ");
if (dmastat & DMASCR_CHAIN_COMPLETE)
- printk("CHAIN_COMPLETE ");
+ printk(KERN_CONT "CHAIN_COMPLETE ");
if (dmastat & DMASCR_DMA_COMPLETE)
- printk("DMA_COMPLETE ");
+ printk(KERN_CONT "DMA_COMPLETE ");
printk("\n");
}
/* make the last descriptor end the chain */
page = &card->mm_pages[card->Active];
- pr_debug("start_io: %d %d->%d\n", card->Active, page->headcnt, page->cnt-1);
+ pr_debug("start_io: %d %d->%d\n",
+ card->Active, page->headcnt, page->cnt - 1);
desc = &page->desc[page->cnt-1];
desc->control_bits |= cpu_to_le32(DMASCR_CHAIN_COMP_EN);
writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR);
writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR + 4);
- offset = ((char*)desc) - ((char*)page->desc);
- writel(cpu_to_le32((page->page_dma+offset)&0xffffffff),
+ offset = ((char *)desc) - ((char *)page->desc);
+ writel(cpu_to_le32((page->page_dma+offset) & 0xffffffff),
card->csr_remap + DMA_DESCRIPTOR_ADDR);
/* Force the value to u64 before shifting otherwise >> 32 is undefined C
* and on some ports will do nothing ! */
page->cnt = 0;
page->headcnt = 0;
page->bio = NULL;
- page->biotail = & page->bio;
+ page->biotail = &page->bio;
}
static void mm_unplug_device(struct request_queue *q)
vec->bv_page,
vec->bv_offset,
len,
- (rw==READ) ?
+ (rw == READ) ?
PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
p = &card->mm_pages[card->Ready];
desc->pci_addr = cpu_to_le64((u64)desc->data_dma_handle);
desc->local_addr = cpu_to_le64(card->current_sector << 9);
desc->transfer_size = cpu_to_le32(len);
- offset = ( ((char*)&desc->sem_control_bits) - ((char*)p->desc));
+ offset = (((char *)&desc->sem_control_bits) - ((char *)p->desc));
desc->sem_addr = cpu_to_le64((u64)(p->page_dma+offset));
desc->zero1 = desc->zero2 = 0;
- offset = ( ((char*)(desc+1)) - ((char*)p->desc));
+ offset = (((char *)(desc+1)) - ((char *)p->desc));
desc->next_desc_addr = cpu_to_le64(p->page_dma+offset);
desc->control_bits = cpu_to_le32(DMASCR_GO|DMASCR_ERR_INT_EN|
DMASCR_PARITY_INT_EN|
/* check if any of the requests in the page are DMA_COMPLETE,
* and deal with them appropriately.
* If we find a descriptor without DMA_COMPLETE in the semaphore, then
- * dma must have hit an error on that descriptor, so use dma_status instead
- * and assume that all following descriptors must be re-tried.
+ * dma must have hit an error on that descriptor, so use dma_status
+ * instead and assume that all following descriptors must be re-tried.
*/
struct mm_page *page;
- struct bio *return_bio=NULL;
+ struct bio *return_bio = NULL;
struct cardinfo *card = (struct cardinfo *)data;
unsigned int dma_status = card->dma_status;
struct bio *bio = page->bio;
struct mm_dma_desc *desc = &page->desc[page->headcnt];
int control = le32_to_cpu(desc->sem_control_bits);
- int last=0;
+ int last = 0;
int idx;
if (!(control & DMASCR_DMA_COMPLETE)) {
control = dma_status;
- last=1;
+ last = 1;
}
page->headcnt++;
idx = page->idx;
}
pci_unmap_page(card->dev, desc->data_dma_handle,
- bio_iovec_idx(bio,idx)->bv_len,
- (control& DMASCR_TRANSFER_READ) ?
+ bio_iovec_idx(bio, idx)->bv_len,
+ (control & DMASCR_TRANSFER_READ) ?
PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
if (control & DMASCR_HARD_ERROR) {
/* error */
le32_to_cpu(desc->transfer_size));
dump_dmastat(card, control);
} else if (test_bit(BIO_RW, &bio->bi_rw) &&
- le32_to_cpu(desc->local_addr)>>9 == card->init_size) {
- card->init_size += le32_to_cpu(desc->transfer_size)>>9;
- if (card->init_size>>1 >= card->mm_size) {
+ le32_to_cpu(desc->local_addr) >> 9 ==
+ card->init_size) {
+ card->init_size += le32_to_cpu(desc->transfer_size) >> 9;
+ if (card->init_size >> 1 >= card->mm_size) {
dev_printk(KERN_INFO, &card->dev->dev,
"memory now initialised\n");
set_userbit(card, MEMORY_INITIALIZED, 1);
return_bio = bio;
}
- if (last) break;
+ if (last)
+ break;
}
if (debug & DEBUG_LED_ON_TRANSFER)
out_unlock:
spin_unlock_bh(&card->lock);
- while(return_bio) {
+ while (return_bio) {
struct bio *bio = return_bio;
return_bio = bio->bi_next;
}
}
-/*
------------------------------------------------------------------------------------
--- mm_make_request
------------------------------------------------------------------------------------
-*/
static int mm_make_request(struct request_queue *q, struct bio *bio)
{
struct cardinfo *card = q->queuedata;
return 0;
}
-/*
------------------------------------------------------------------------------------
--- mm_interrupt
------------------------------------------------------------------------------------
-*/
static irqreturn_t mm_interrupt(int irq, void *__card)
{
struct cardinfo *card = (struct cardinfo *) __card;
if (!(dma_status & (DMASCR_ERROR_MASK | DMASCR_CHAIN_COMPLETE))) {
/* interrupt wasn't for me ... */
return IRQ_NONE;
- }
+ }
/* clear COMPLETION interrupts */
if (card->flags & UM_FLAG_NO_BYTE_STATUS)
writel(cpu_to_le32(DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE),
- card->csr_remap+ DMA_STATUS_CTRL);
+ card->csr_remap + DMA_STATUS_CTRL);
else
writeb((DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE) >> 16,
- card->csr_remap+ DMA_STATUS_CTRL + 2);
+ card->csr_remap + DMA_STATUS_CTRL + 2);
/* log errors and clear interrupt status */
if (dma_status & DMASCR_ANY_ERR) {
stat = readb(card->csr_remap + MEMCTRLCMD_ERRSTATUS);
- data_log1 = le32_to_cpu(readl(card->csr_remap + ERROR_DATA_LOG));
- data_log2 = le32_to_cpu(readl(card->csr_remap + ERROR_DATA_LOG + 4));
- addr_log1 = le32_to_cpu(readl(card->csr_remap + ERROR_ADDR_LOG));
+ data_log1 = le32_to_cpu(readl(card->csr_remap +
+ ERROR_DATA_LOG));
+ data_log2 = le32_to_cpu(readl(card->csr_remap +
+ ERROR_DATA_LOG + 4));
+ addr_log1 = le32_to_cpu(readl(card->csr_remap +
+ ERROR_ADDR_LOG));
addr_log2 = readb(card->csr_remap + ERROR_ADDR_LOG + 4);
count = readb(card->csr_remap + ERROR_COUNT);
return IRQ_HANDLED;
}
-/*
------------------------------------------------------------------------------------
--- set_fault_to_battery_status
------------------------------------------------------------------------------------
-*/
+
/*
* If both batteries are good, no LED
* If either battery has been warned, solid LED
static void init_battery_timer(void);
-
-/*
------------------------------------------------------------------------------------
--- check_battery
------------------------------------------------------------------------------------
-*/
static int check_battery(struct cardinfo *card, int battery, int status)
{
if (status != card->battery[battery].good) {
return 0;
}
-/*
------------------------------------------------------------------------------------
--- check_batteries
------------------------------------------------------------------------------------
-*/
+
static void check_batteries(struct cardinfo *card)
{
/* NOTE: this must *never* be called while the card
init_battery_timer();
}
-/*
------------------------------------------------------------------------------------
--- init_battery_timer
------------------------------------------------------------------------------------
-*/
+
static void init_battery_timer(void)
{
init_timer(&battery_timer);
battery_timer.expires = jiffies + (HZ * 60);
add_timer(&battery_timer);
}
-/*
------------------------------------------------------------------------------------
--- del_battery_timer
------------------------------------------------------------------------------------
-*/
+
static void del_battery_timer(void)
{
del_timer(&battery_timer);
}
-/*
------------------------------------------------------------------------------------
--- mm_revalidate
------------------------------------------------------------------------------------
-*/
+
/*
* Note no locks taken out here. In a worst case scenario, we could drop
* a chunk of system memory. But that should never happen, since validation
}
/*
------------------------------------------------------------------------------------
--- mm_check_change
------------------------------------------------------------------------------------
- Future support for removable devices
-*/
+ * Future support for removable devices
+ */
static int mm_check_change(struct gendisk *disk)
{
/* struct cardinfo *dev = disk->private_data; */
return 0;
}
-/*
------------------------------------------------------------------------------------
--- mm_fops
------------------------------------------------------------------------------------
-*/
+
static struct block_device_operations mm_fops = {
.owner = THIS_MODULE,
.getgeo = mm_getgeo,
- .revalidate_disk= mm_revalidate,
+ .revalidate_disk = mm_revalidate,
.media_changed = mm_check_change,
};
-/*
------------------------------------------------------------------------------------
--- mm_pci_probe
------------------------------------------------------------------------------------
-*/
-static int __devinit mm_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
+
+static int __devinit mm_pci_probe(struct pci_dev *dev,
+ const struct pci_device_id *id)
{
int ret = -ENODEV;
struct cardinfo *card = &cards[num_cards];
return -ENODEV;
dev_printk(KERN_INFO, &dev->dev,
- "Micro Memory(tm) controller found (PCI Mem Module (Battery Backup))\n");
+ "Micro Memory(tm) controller found (PCI Mem Module (Battery Backup))\n");
if (pci_set_dma_mask(dev, DMA_64BIT_MASK) &&
pci_set_dma_mask(dev, DMA_32BIT_MASK)) {
"CSR 0x%08lx -> 0x%p (0x%lx)\n",
csr_base, card->csr_remap, csr_len);
- switch(card->dev->device) {
+ switch (card->dev->device) {
case 0x5415:
card->flags |= UM_FLAG_NO_BYTE_STATUS | UM_FLAG_NO_BATTREG;
magic_number = 0x59;
break;
case 0x6155:
- card->flags |= UM_FLAG_NO_BYTE_STATUS | UM_FLAG_NO_BATTREG | UM_FLAG_NO_BATT;
+ card->flags |= UM_FLAG_NO_BYTE_STATUS |
+ UM_FLAG_NO_BATTREG | UM_FLAG_NO_BATT;
magic_number = 0x99;
break;
}
card->mm_pages[0].desc = pci_alloc_consistent(card->dev,
- PAGE_SIZE*2,
- &card->mm_pages[0].page_dma);
+ PAGE_SIZE * 2,
+ &card->mm_pages[0].page_dma);
card->mm_pages[1].desc = pci_alloc_consistent(card->dev,
- PAGE_SIZE*2,
- &card->mm_pages[1].page_dma);
+ PAGE_SIZE * 2,
+ &card->mm_pages[1].page_dma);
if (card->mm_pages[0].desc == NULL ||
card->mm_pages[1].desc == NULL) {
dev_printk(KERN_ERR, &card->dev->dev, "alloc failed\n");
dev_printk(KERN_INFO, &card->dev->dev,
"Size %d KB, Battery 1 %s (%s), Battery 2 %s (%s)\n",
card->mm_size,
- (batt_status & BATTERY_1_DISABLED ? "Disabled" : "Enabled"),
+ batt_status & BATTERY_1_DISABLED ? "Disabled" : "Enabled",
card->battery[0].good ? "OK" : "FAILURE",
- (batt_status & BATTERY_2_DISABLED ? "Disabled" : "Enabled"),
+ batt_status & BATTERY_2_DISABLED ? "Disabled" : "Enabled",
card->battery[1].good ? "OK" : "FAILURE");
set_fault_to_battery_status(card);
data = ~data;
data += 1;
- if (request_irq(dev->irq, mm_interrupt, IRQF_SHARED, DRIVER_NAME, card)) {
+ if (request_irq(dev->irq, mm_interrupt, IRQF_SHARED, DRIVER_NAME,
+ card)) {
dev_printk(KERN_ERR, &card->dev->dev,
"Unable to allocate IRQ\n");
ret = -ENODEV;
-
goto failed_req_irq;
}
dev_printk(KERN_INFO, &card->dev->dev,
"Window size %d bytes, IRQ %d\n", data, dev->irq);
- spin_lock_init(&card->lock);
+ spin_lock_init(&card->lock);
pci_set_drvdata(dev, card);
if (!get_userbit(card, MEMORY_INITIALIZED)) {
dev_printk(KERN_INFO, &card->dev->dev,
- "memory NOT initialized. Consider over-writing whole device.\n");
+ "memory NOT initialized. Consider over-writing whole device.\n");
card->init_size = 0;
} else {
dev_printk(KERN_INFO, &card->dev->dev,
return ret;
}
-/*
------------------------------------------------------------------------------------
--- mm_pci_remove
------------------------------------------------------------------------------------
-*/
+
static void mm_pci_remove(struct pci_dev *dev)
{
struct cardinfo *card = pci_get_drvdata(dev);
}
static const struct pci_device_id mm_pci_ids[] = {
- {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY,PCI_DEVICE_ID_MICRO_MEMORY_5415CN)},
- {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY,PCI_DEVICE_ID_MICRO_MEMORY_5425CN)},
- {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY,PCI_DEVICE_ID_MICRO_MEMORY_6155)},
+ {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5415CN)},
+ {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5425CN)},
+ {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_6155)},
{
.vendor = 0x8086,
.device = 0xB555,
- .subvendor= 0x1332,
- .subdevice= 0x5460,
- .class = 0x050000,
- .class_mask= 0,
+ .subvendor = 0x1332,
+ .subdevice = 0x5460,
+ .class = 0x050000,
+ .class_mask = 0,
}, { /* end: all zeroes */ }
};
.remove = mm_pci_remove,
};
-/*
------------------------------------------------------------------------------------
--- mm_init
------------------------------------------------------------------------------------
-*/
-
static int __init mm_init(void)
{
int retval, i;
put_disk(mm_gendisk[i]);
return -ENOMEM;
}
-/*
------------------------------------------------------------------------------------
--- mm_cleanup
------------------------------------------------------------------------------------
-*/
+
static void __exit mm_cleanup(void)
{
int i;
del_battery_timer();
- for (i=0; i < num_cards ; i++) {
+ for (i = 0; i < num_cards ; i++) {
del_gendisk(mm_gendisk[i]);
put_disk(mm_gendisk[i]);
}
config DM_MULTIPATH_HP
tristate "HP MSA multipath support (EXPERIMENTAL)"
- depends on DM_MULTIPATH && BLK_DEV_DM && EXPERIMENTAL
+ depends on DM_MULTIPATH && BLK_DEV_DM && SCSI && EXPERIMENTAL
---help---
Multipath support for HP MSA (Active/Passive) series hardware.
struct bio *clone;
unsigned int nr_iovecs = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
gfp_t gfp_mask = GFP_NOIO | __GFP_HIGHMEM;
- unsigned int i;
+ unsigned i, len;
+ struct page *page;
clone = bio_alloc_bioset(GFP_NOIO, nr_iovecs, cc->bs);
if (!clone)
clone_init(io, clone);
for (i = 0; i < nr_iovecs; i++) {
- struct bio_vec *bv = bio_iovec_idx(clone, i);
-
- bv->bv_page = mempool_alloc(cc->page_pool, gfp_mask);
- if (!bv->bv_page)
+ page = mempool_alloc(cc->page_pool, gfp_mask);
+ if (!page)
break;
/*
if (i == (MIN_BIO_PAGES - 1))
gfp_mask = (gfp_mask | __GFP_NOWARN) & ~__GFP_WAIT;
- bv->bv_offset = 0;
- if (size > PAGE_SIZE)
- bv->bv_len = PAGE_SIZE;
- else
- bv->bv_len = size;
+ len = (size > PAGE_SIZE) ? PAGE_SIZE : size;
+
+ if (!bio_add_page(clone, page, len, 0)) {
+ mempool_free(page, cc->page_pool);
+ break;
+ }
- clone->bi_size += bv->bv_len;
- clone->bi_vcnt++;
- size -= bv->bv_len;
+ size -= len;
}
if (!clone->bi_size) {
struct crypt_config *cc = io->target->private;
unsigned read_io = bio_data_dir(clone) == READ;
+ if (unlikely(!bio_flagged(clone, BIO_UPTODATE) && !error))
+ error = -EIO;
+
/*
* free the processed pages
*/
goto out;
}
- if (unlikely(!bio_flagged(clone, BIO_UPTODATE))) {
- error = -EIO;
+ if (unlikely(error))
goto out;
- }
bio_put(clone);
kcryptd_queue_crypt(io);
dm_table_put(table);
}
+ dm_kobject_uevent(hc->md);
+
dm_put(hc->md);
up_write(&_hash_lock);
kfree(old_name);
if (!table)
goto out_argv;
- if (tmsg->sector >= dm_table_get_size(table)) {
+ ti = dm_table_find_target(table, tmsg->sector);
+ if (!dm_target_is_valid(ti)) {
DMWARN("Target message sector outside device.");
r = -EINVAL;
- goto out_table;
- }
-
- ti = dm_table_find_target(table, tmsg->sector);
- if (ti->type->message)
+ } else if (ti->type->message)
r = ti->type->message(ti, argc, argv);
else {
DMWARN("Target type does not support messages");
r = -EINVAL;
}
- out_table:
dm_table_put(table);
out_argv:
kfree(argv);
lhs->max_segment_size =
min_not_zero(lhs->max_segment_size, rhs->max_segment_size);
+ lhs->max_hw_sectors =
+ min_not_zero(lhs->max_hw_sectors, rhs->max_hw_sectors);
+
lhs->seg_boundary_mask =
min_not_zero(lhs->seg_boundary_mask, rhs->seg_boundary_mask);
/*
* Allocate both the target array and offset array at once.
+ * Append an empty entry to catch sectors beyond the end of
+ * the device.
*/
- n_highs = (sector_t *) dm_vcalloc(num, sizeof(struct dm_target) +
+ n_highs = (sector_t *) dm_vcalloc(num + 1, sizeof(struct dm_target) +
sizeof(sector_t));
if (!n_highs)
return -ENOMEM;
rs->max_segment_size =
min_not_zero(rs->max_segment_size, q->max_segment_size);
+ rs->max_hw_sectors =
+ min_not_zero(rs->max_hw_sectors, q->max_hw_sectors);
+
rs->seg_boundary_mask =
min_not_zero(rs->seg_boundary_mask,
q->seg_boundary_mask);
{
if (!rs->max_sectors)
rs->max_sectors = SAFE_MAX_SECTORS;
+ if (!rs->max_hw_sectors)
+ rs->max_hw_sectors = SAFE_MAX_SECTORS;
if (!rs->max_phys_segments)
rs->max_phys_segments = MAX_PHYS_SEGMENTS;
if (!rs->max_hw_segments)
/*
* Search the btree for the correct target.
+ *
+ * Caller should check returned pointer with dm_target_is_valid()
+ * to trap I/O beyond end of device.
*/
struct dm_target *dm_table_find_target(struct dm_table *t, sector_t sector)
{
q->max_hw_segments = t->limits.max_hw_segments;
q->hardsect_size = t->limits.hardsect_size;
q->max_segment_size = t->limits.max_segment_size;
+ q->max_hw_sectors = t->limits.max_hw_sectors;
q->seg_boundary_mask = t->limits.seg_boundary_mask;
q->bounce_pfn = t->limits.bounce_pfn;
if (t->limits.no_cluster)
return clone;
}
-static void __clone_and_map(struct clone_info *ci)
+static int __clone_and_map(struct clone_info *ci)
{
struct bio *clone, *bio = ci->bio;
- struct dm_target *ti = dm_table_find_target(ci->map, ci->sector);
- sector_t len = 0, max = max_io_len(ci->md, ci->sector, ti);
+ struct dm_target *ti;
+ sector_t len = 0, max;
struct dm_target_io *tio;
+ ti = dm_table_find_target(ci->map, ci->sector);
+ if (!dm_target_is_valid(ti))
+ return -EIO;
+
+ max = max_io_len(ci->md, ci->sector, ti);
+
/*
* Allocate a target io object.
*/
do {
if (offset) {
ti = dm_table_find_target(ci->map, ci->sector);
+ if (!dm_target_is_valid(ti))
+ return -EIO;
+
max = max_io_len(ci->md, ci->sector, ti);
tio = alloc_tio(ci->md);
ci->idx++;
}
+
+ return 0;
}
/*
static int __split_bio(struct mapped_device *md, struct bio *bio)
{
struct clone_info ci;
+ int error = 0;
ci.map = dm_get_table(md);
if (unlikely(!ci.map))
ci.idx = bio->bi_idx;
start_io_acct(ci.io);
- while (ci.sector_count)
- __clone_and_map(&ci);
+ while (ci.sector_count && !error)
+ error = __clone_and_map(&ci);
/* drop the extra reference count */
- dec_pending(ci.io, 0);
+ dec_pending(ci.io, error);
dm_table_put(ci.map);
return 0;
dm_table_unplug_all(map);
- kobject_uevent(&md->disk->kobj, KOBJ_CHANGE);
+ dm_kobject_uevent(md);
r = 0;
/*-----------------------------------------------------------------
* Event notification.
*---------------------------------------------------------------*/
+void dm_kobject_uevent(struct mapped_device *md)
+{
+ kobject_uevent(&md->disk->kobj, KOBJ_CHANGE);
+}
+
uint32_t dm_next_uevent_seq(struct mapped_device *md)
{
return atomic_add_return(1, &md->uevent_seq);
int dm_table_any_congested(struct dm_table *t, int bdi_bits);
void dm_table_unplug_all(struct dm_table *t);
+/*
+ * To check the return value from dm_table_find_target().
+ */
+#define dm_target_is_valid(t) ((t)->table)
+
/*-----------------------------------------------------------------
* A registry of target types.
*---------------------------------------------------------------*/
int dm_open_count(struct mapped_device *md);
int dm_lock_for_deletion(struct mapped_device *md);
+void dm_kobject_uevent(struct mapped_device *md);
+
#endif
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or (at
* your option) any later version.
+ *
+ * Thanks to the following companies for their support:
+ *
+ * - JMicron (hardware and technical support)
*/
#include <linux/delay.h>
static unsigned int debug_quirks = 0;
+/*
+ * Different quirks to handle when the hardware deviates from a strict
+ * interpretation of the SDHCI specification.
+ */
+
+/* Controller doesn't honor resets unless we touch the clock register */
#define SDHCI_QUIRK_CLOCK_BEFORE_RESET (1<<0)
+/* Controller has bad caps bits, but really supports DMA */
#define SDHCI_QUIRK_FORCE_DMA (1<<1)
/* Controller doesn't like some resets when there is no card inserted. */
#define SDHCI_QUIRK_NO_CARD_NO_RESET (1<<2)
+/* Controller doesn't like clearing the power reg before a change */
#define SDHCI_QUIRK_SINGLE_POWER_WRITE (1<<3)
+/* Controller has flaky internal state so reset it on each ios change */
#define SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS (1<<4)
+/* Controller has an unusable DMA engine */
#define SDHCI_QUIRK_BROKEN_DMA (1<<5)
+/* Controller can only DMA from 32-bit aligned addresses */
+#define SDHCI_QUIRK_32BIT_DMA_ADDR (1<<6)
+/* Controller can only DMA chunk sizes that are a multiple of 32 bits */
+#define SDHCI_QUIRK_32BIT_DMA_SIZE (1<<7)
+/* Controller needs to be reset after each request to stay stable */
+#define SDHCI_QUIRK_RESET_AFTER_REQUEST (1<<8)
static const struct pci_device_id pci_ids[] __devinitdata = {
{
SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS,
},
+ {
+ .vendor = PCI_VENDOR_ID_JMICRON,
+ .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
+ .subvendor = PCI_ANY_ID,
+ .subdevice = PCI_ANY_ID,
+ .driver_data = SDHCI_QUIRK_32BIT_DMA_ADDR |
+ SDHCI_QUIRK_32BIT_DMA_SIZE |
+ SDHCI_QUIRK_RESET_AFTER_REQUEST,
+ },
+
{ /* Generic SD host controller */
PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
},
writeb(count, host->ioaddr + SDHCI_TIMEOUT_CONTROL);
- if (host->flags & SDHCI_USE_DMA) {
+ if (host->flags & SDHCI_USE_DMA)
+ host->flags |= SDHCI_REQ_USE_DMA;
+
+ if (unlikely((host->flags & SDHCI_REQ_USE_DMA) &&
+ (host->chip->quirks & SDHCI_QUIRK_32BIT_DMA_SIZE) &&
+ ((data->blksz * data->blocks) & 0x3))) {
+ DBG("Reverting to PIO because of transfer size (%d)\n",
+ data->blksz * data->blocks);
+ host->flags &= ~SDHCI_REQ_USE_DMA;
+ }
+
+ /*
+ * The assumption here being that alignment is the same after
+ * translation to device address space.
+ */
+ if (unlikely((host->flags & SDHCI_REQ_USE_DMA) &&
+ (host->chip->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) &&
+ (data->sg->offset & 0x3))) {
+ DBG("Reverting to PIO because of bad alignment\n");
+ host->flags &= ~SDHCI_REQ_USE_DMA;
+ }
+
+ if (host->flags & SDHCI_REQ_USE_DMA) {
int count;
count = pci_map_sg(host->chip->pdev, data->sg, data->sg_len,
mode |= SDHCI_TRNS_MULTI;
if (data->flags & MMC_DATA_READ)
mode |= SDHCI_TRNS_READ;
- if (host->flags & SDHCI_USE_DMA)
+ if (host->flags & SDHCI_REQ_USE_DMA)
mode |= SDHCI_TRNS_DMA;
writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE);
data = host->data;
host->data = NULL;
- if (host->flags & SDHCI_USE_DMA) {
+ if (host->flags & SDHCI_REQ_USE_DMA) {
pci_unmap_sg(host->chip->pdev, data->sg, data->sg_len,
(data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
}
*/
if (mrq->cmd->error ||
(mrq->data && (mrq->data->error ||
- (mrq->data->stop && mrq->data->stop->error)))) {
+ (mrq->data->stop && mrq->data->stop->error))) ||
+ (host->chip->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST)) {
/* Some controllers need this kick or reset won't work here */
if (host->chip->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) {
version = readw(host->ioaddr + SDHCI_HOST_VERSION);
version = (version & SDHCI_SPEC_VER_MASK) >> SDHCI_SPEC_VER_SHIFT;
- if (version != 0) {
+ if (version > 1) {
printk(KERN_ERR "%s: Unknown controller version (%d). "
"You may experience problems.\n", host->slot_descr,
version);
spinlock_t lock; /* Mutex */
int flags; /* Host attributes */
-#define SDHCI_USE_DMA (1<<0)
+#define SDHCI_USE_DMA (1<<0) /* Host is DMA capable */
+#define SDHCI_REQ_USE_DMA (1<<1) /* Use DMA for this req. */
unsigned int max_clk; /* Max possible freq (MHz) */
unsigned int timeout_clk; /* Timeout freq (KHz) */
}
pci_set_master(pDev);
- if (pci_set_dma_mask(pDev, DMA_64BIT_MASK) &&
- pci_set_dma_mask(pDev, DMA_32BIT_MASK))
+ if (pci_set_dma_mask(pDev, DMA_32BIT_MASK))
return -EINVAL;
base_addr0_phys = pci_resource_start(pDev,0);
scsi_for_each_sg(cmnd, sglist, cblk->sglen, i) {
sg->data = cpu_to_le32((u32)sg_dma_address(sglist));
total_len += sg->len = cpu_to_le32((u32)sg_dma_len(sglist));
+ ++sg;
}
cblk->buflen = (scsi_bufflen(cmnd) > total_len) ?
}
host = (struct initio_host *)shost->hostdata;
memset(host, 0, sizeof(struct initio_host));
+ host->addr = pci_resource_start(pdev, 0);
if (!request_region(host->addr, 256, "i91u")) {
printk(KERN_WARNING "initio: I/O port range 0x%x is busy.\n", host->addr);
tb->dma = need_dma;
tb->buffer_size = got;
+ sg_init_table(tb->sg, max_sg);
return tb;
}
* Free O/S specific resources.
*/
if (pdev->irq)
- free_irq(pdev->irq, np);
+ free_irq(pdev->irq, np->s.host);
if (np->s.ioaddr)
pci_iounmap(pdev, np->s.ioaddr);
if (np->s.ramaddr)
istat = INB(np, nc_istat);
if (istat & INTF) {
OUTB(np, nc_istat, (istat & SIGP) | INTF | np->istat_sem);
- istat = INB(np, nc_istat); /* DUMMY READ */
+ istat |= INB(np, nc_istat); /* DUMMY READ */
if (DEBUG_FLAGS & DEBUG_TINY) printf ("F ");
sym_wakeup_done(np);
}
#define L1GPU_DISPLAY_SYNC_HSYNC 1
#define L1GPU_DISPLAY_SYNC_VSYNC 2
-#define GPU_CMD_BUF_SIZE (64 * 1024)
+#define GPU_CMD_BUF_SIZE (2 * 1024 * 1024)
+#define GPU_FB_START (64 * 1024)
#define GPU_IOIF (0x0d000000UL)
#define GPU_ALIGN_UP(x) _ALIGN_UP((x), 64)
#define GPU_MAX_LINE_LENGTH (65536 - 64)
if (src_line_length != dst_line_length)
line_length |= (u64)src_line_length << 32;
+ src_offset += GPU_FB_START;
status = lv1_gpu_context_attribute(ps3fb.context_handle,
L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT,
dst_offset, GPU_IOIF + src_offset,
status = lv1_gpu_context_attribute(ps3fb.context_handle,
L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP,
- xdr_lpar + ps3fb.xdr_size,
- GPU_CMD_BUF_SIZE,
- GPU_IOIF + ps3fb.xdr_size, 0);
+ xdr_lpar, GPU_CMD_BUF_SIZE,
+ GPU_IOIF, 0);
if (status) {
dev_err(dev,
"%s: lv1_gpu_context_attribute FB_SETUP failed: %d\n",
struct task_struct *task;
unsigned long max_ps3fb_size;
+ if (ps3fb_videomemory.size < GPU_CMD_BUF_SIZE) {
+ dev_err(&dev->core, "%s: Not enough video memory\n", __func__);
+ return -ENOMEM;
+ }
+
status = ps3_open_hv_device(dev);
if (status) {
dev_err(&dev->core, "%s: ps3_open_hv_device failed\n",
/* Clear memory to prevent kernel info leakage into userspace */
memset(ps3fb.xdr_ea, 0, ps3fb_videomemory.size);
- /* The GPU command buffer is at the end of video memory */
- ps3fb.xdr_size = ps3fb_videomemory.size - GPU_CMD_BUF_SIZE;
+ /*
+ * The GPU command buffer is at the start of video memory
+ * As we don't use the full command buffer, we can put the actual
+ * frame buffer at offset GPU_FB_START and save some precious XDR
+ * memory
+ */
+ ps3fb.xdr_ea += GPU_FB_START;
+ ps3fb.xdr_size = ps3fb_videomemory.size - GPU_FB_START;
retval = ps3fb_xdr_settings(xdr_lpar, &dev->core);
if (retval)
err_framebuffer_release:
framebuffer_release(info);
err_free_irq:
- free_irq(ps3fb.irq_no, dev);
+ free_irq(ps3fb.irq_no, &dev->core);
ps3_irq_plug_destroy(ps3fb.irq_no);
err_iounmap_dinfo:
iounmap((u8 __iomem *)ps3fb.dinfo);
kthread_stop(task);
}
if (ps3fb.irq_no) {
- free_irq(ps3fb.irq_no, dev);
+ free_irq(ps3fb.irq_no, &dev->core);
ps3_irq_plug_destroy(ps3fb.irq_no);
}
iounmap((u8 __iomem *)ps3fb.dinfo);
current->mm->free_area_cache = current->mm->mmap_base;
current->mm->cached_hole_size = 0;
- current->mm->mmap = NULL;
compute_creds(bprm);
current->flags &= ~PF_FORKNOEXEC;
#ifdef __sparc__
/**
* __clear_bit_unlock - Non-atomically clear a bit with release
*
- * This is like clear_bit_unlock, but the implementation may use a non-atomic
- * store (this one uses an atomic, however).
+ * This is like clear_bit_unlock, but the implementation uses a store
+ * with release semantics. See also __raw_spin_unlock().
*/
-#define __clear_bit_unlock clear_bit_unlock
+static __inline__ void
+__clear_bit_unlock(int nr, volatile void *addr)
+{
+ __u32 mask, new;
+ volatile __u32 *m;
+
+ m = (volatile __u32 *)addr + (nr >> 5);
+ mask = ~(1 << (nr & 31));
+ new = *m & mask;
+ barrier();
+ ia64_st4_rel_nta(m, new);
+}
/**
* __clear_bit - Clears a bit in memory (non-atomic version)
asm volatile ("ldf.fill %0=[%1]" :"=f"(__f__): "r"(x)); \
})
+#define ia64_st4_rel_nta(m, val) \
+({ \
+ asm volatile ("st4.rel.nta [%0] = %1\n\t" :: "r"(m), "r"(val)); \
+})
+
#define ia64_stfs(x, regnum) \
({ \
register double __f__ asm ("f"#regnum); \
#define IA64_NUM_DEVICE_VECTORS (IA64_LAST_DEVICE_VECTOR - IA64_FIRST_DEVICE_VECTOR + 1)
#define IA64_MCA_RENDEZ_VECTOR 0xe8 /* MCA rendez interrupt */
-#define IA64_PERFMON_VECTOR 0xee /* performanc monitor interrupt vector */
+#define IA64_PERFMON_VECTOR 0xee /* performance monitor interrupt vector */
#define IA64_TIMER_VECTOR 0xef /* use highest-prio group 15 interrupt for timer */
#define IA64_MCA_WAKEUP_VECTOR 0xf0 /* MCA wakeup (must be >MCA_RENDEZ_VECTOR) */
#define IA64_IPI_LOCAL_TLB_FLUSH 0xfc /* SMP flush local TLB */
#define ia64_st4_rel __st4_rel
#define ia64_st8_rel __st8_rel
+/* FIXME: need st4.rel.nta intrinsic */
+#define ia64_st4_rel_nta __st4_rel
+
#define ia64_ld1_acq __ld1_acq
#define ia64_ld2_acq __ld2_acq
#define ia64_ld4_acq __ld4_acq
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (c) 2000-2006 Silicon Graphics, Inc. All Rights Reserved.
+ * Copyright (c) 2000-2007 Silicon Graphics, Inc. All Rights Reserved.
*/
BTEFAIL_NOTAVAIL, /* BTE not available */
} bte_result_t;
+#define BTEFAIL_SH2_RESP_SHORT 0x1 /* bit 000001 */
+#define BTEFAIL_SH2_RESP_LONG 0x2 /* bit 000010 */
+#define BTEFAIL_SH2_RESP_DSP 0x4 /* bit 000100 */
+#define BTEFAIL_SH2_RESP_ACCESS 0x8 /* bit 001000 */
+#define BTEFAIL_SH2_CRB_TO 0x10 /* bit 010000 */
+#define BTEFAIL_SH2_NACK_LIMIT 0x20 /* bit 100000 */
+#define BTEFAIL_SH2_ALL 0x3F /* bit 111111 */
+
+#define BTE_ERR_BITS 0x3FUL
+#define BTE_ERR_SHIFT 36
+#define BTE_ERR_MASK (BTE_ERR_BITS << BTE_ERR_SHIFT)
+
+#define BTE_ERROR_RETRY(value) \
+ (is_shub2() ? (value != BTEFAIL_SH2_CRB_TO) \
+ : (value != BTEFAIL_TOUT))
+
+/*
+ * On shub1 BTE_ERR_MASK will always be false, so no need for is_shub2()
+ */
+#define BTE_SHUB2_ERROR(_status) \
+ ((_status & BTE_ERR_MASK) \
+ ? (((_status >> BTE_ERR_SHIFT) & BTE_ERR_BITS) | IBLS_ERROR) \
+ : _status)
+
+#define BTE_GET_ERROR_STATUS(_status) \
+ (BTE_SHUB2_ERROR(_status) & ~IBLS_ERROR)
+
+#define BTE_VALID_SH2_ERROR(value) \
+ ((value >= BTEFAIL_SH2_RESP_SHORT) && (value <= BTEFAIL_SH2_ALL))
/*
* Structure defining a bte. An instance of this
BUG_ON(REGION_NUMBER(vdst) != RGN_KERNEL);
ret = bte_copy(src, pdst, len, mode, notification);
- if (ret != BTE_SUCCESS) {
+ if ((ret != BTE_SUCCESS) && BTE_ERROR_RETRY(ret)) {
if (!in_interrupt()) {
cond_resched();
}
xpcDisconnected, /* 51: channel disconnected (closed) */
- xpcUnknownReason /* 52: unknown reason -- must be last in list */
+ xpcBteSh2Start, /* 52: BTE CRB timeout */
+
+ /* 53: 0x1 BTE Error Response Short */
+ xpcBteSh2RspShort = xpcBteSh2Start + BTEFAIL_SH2_RESP_SHORT,
+
+ /* 54: 0x2 BTE Error Response Long */
+ xpcBteSh2RspLong = xpcBteSh2Start + BTEFAIL_SH2_RESP_LONG,
+
+ /* 56: 0x4 BTE Error Response DSB */
+ xpcBteSh2RspDSB = xpcBteSh2Start + BTEFAIL_SH2_RESP_DSP,
+
+ /* 60: 0x8 BTE Error Response Access */
+ xpcBteSh2RspAccess = xpcBteSh2Start + BTEFAIL_SH2_RESP_ACCESS,
+
+ /* 68: 0x10 BTE Error CRB timeout */
+ xpcBteSh2CRBTO = xpcBteSh2Start + BTEFAIL_SH2_CRB_TO,
+
+ /* 84: 0x20 BTE Error NACK limit */
+ xpcBteSh2NACKLimit = xpcBteSh2Start + BTEFAIL_SH2_NACK_LIMIT,
+
+ /* 115: BTE end */
+ xpcBteSh2End = xpcBteSh2Start + BTEFAIL_SH2_ALL,
+
+ xpcUnknownReason /* 116: unknown reason -- must be last in list */
};
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (c) 2004-2006 Silicon Graphics, Inc. All Rights Reserved.
+ * Copyright (c) 2004-2007 Silicon Graphics, Inc. All Rights Reserved.
*/
static inline enum xpc_retval
xpc_map_bte_errors(bte_result_t error)
{
+ if (is_shub2()) {
+ if (BTE_VALID_SH2_ERROR(error))
+ return xpcBteSh2Start + error;
+ else
+ return xpcBteUnmappedError;
+ }
switch (error) {
case BTE_SUCCESS: return xpcSuccess;
case BTEFAIL_DIR: return xpcBteDirectoryError;
#define smp_local_flush_tlb()
#endif
-#define flush_tlb_kernel_range(start, end) flush_tlb_all() /* XXX fix me */
+static inline void flush_tlb_kernel_range(unsigned long start,
+ unsigned long end)
+{
+ flush_tlb_all(); /* XXX fix me */
+}
#endif /* _ASM_IA64_TLBFLUSH_H */
unsigned long kprobe_status;
unsigned long kprobe_old_eflags;
unsigned long kprobe_saved_eflags;
- long *jprobe_saved_esp;
+ unsigned long *jprobe_saved_esp;
struct pt_regs jprobe_saved_regs;
kprobe_opcode_t jprobes_stack[MAX_STACK_SIZE];
struct prev_kprobe prev_kprobe;
unsigned long kprobe_status;
unsigned long kprobe_old_rflags;
unsigned long kprobe_saved_rflags;
- long *jprobe_saved_rsp;
+ unsigned long *jprobe_saved_rsp;
struct pt_regs jprobe_saved_regs;
kprobe_opcode_t jprobes_stack[MAX_STACK_SIZE];
struct prev_kprobe prev_kprobe;
#ifdef __KERNEL__
+/* entries in ARCH_DLINFO: */
+#ifdef CONFIG_IA32_EMULATION
+# define AT_VECTOR_SIZE_ARCH 2
+#else
+# define AT_VECTOR_SIZE_ARCH 1
+#endif
+
#define __SAVE(reg,offset) "movq %%" #reg ",(14-" #offset ")*8(%%rsp)\n\t"
#define __RESTORE(reg,offset) "movq (14-" #offset ")*8(%%rsp),%%" #reg "\n\t"
unsigned short max_hw_segments;
unsigned short hardsect_size;
unsigned int max_segment_size;
+ unsigned int max_hw_sectors;
unsigned long seg_boundary_mask;
unsigned long bounce_pfn;
unsigned char no_cluster; /* inverted so that 0 is default */
/*
* io scheduler registration
*/
-extern int elv_register(struct elevator_type *);
+extern void elv_register(struct elevator_type *);
extern void elv_unregister(struct elevator_type *);
/*
__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
const char *name);
+/* caller has locked the irq_desc and both params are valid */
+static inline void __set_irq_handler_unlocked(int irq,
+ irq_flow_handler_t handler)
+{
+ irq_desc[irq].handle_irq = handler;
+}
+
/*
* Set a highlevel flow handler for a given IRQ:
*/
unsigned int removed:1; /* host is being removed */
#endif
- unsigned int mode; /* current card mode of host */
-#define MMC_MODE_MMC 0
-#define MMC_MODE_SD 1
-
struct mmc_card *card; /* device attached to this host */
wait_queue_head_t wq;
#define PCI_DEVICE_ID_JMICRON_JMB365 0x2365
#define PCI_DEVICE_ID_JMICRON_JMB366 0x2366
#define PCI_DEVICE_ID_JMICRON_JMB368 0x2368
+#define PCI_DEVICE_ID_JMICRON_JMB38X_SD 0x2381
#define PCI_VENDOR_ID_KORENIX 0x1982
#define PCI_DEVICE_ID_KORENIX_JETCARDF0 0x1600
if (unlikely(desc->status & IRQ_INPROGRESS))
goto out_unlock;
+ desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
kstat_cpu(cpu).irqs[irq]++;
action = desc->action;
- if (unlikely(!action || (desc->status & IRQ_DISABLED))) {
- if (desc->chip->mask)
- desc->chip->mask(irq);
- desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
- desc->status |= IRQ_PENDING;
+ if (unlikely(!action || (desc->status & IRQ_DISABLED)))
goto out_unlock;
- }
- desc->status &= ~(IRQ_REPLAY | IRQ_WAITING | IRQ_PENDING);
desc->status |= IRQ_INPROGRESS;
spin_unlock(&desc->lock);
#include <linux/nmi.h>
#include <linux/kexec.h>
#include <linux/debug_locks.h>
+#include <linux/random.h>
int panic_on_oops;
int tainted;
do_oops_enter_exit();
}
+/*
+ * 64-bit random ID for oopses:
+ */
+static u64 oops_id;
+
+static int init_oops_id(void)
+{
+ if (!oops_id)
+ get_random_bytes(&oops_id, sizeof(oops_id));
+
+ return 0;
+}
+late_initcall(init_oops_id);
+
/*
* Called when the architecture exits its oops handler, after printing
* everything.
void oops_exit(void)
{
do_oops_enter_exit();
+ init_oops_id();
+ printk(KERN_WARNING "---[ end trace %016llx ]---\n",
+ (unsigned long long)oops_id);
}
#ifdef CONFIG_CC_STACKPROTECTOR
#include <linux/types.h>
#include <linux/kernel.h>
+#include <linux/sched.h>
#include <linux/module.h>
#include <linux/rwsem.h>
/*
* lock for reading
*/
-void down_read(struct rw_semaphore *sem)
+void __sched down_read(struct rw_semaphore *sem)
{
might_sleep();
rwsem_acquire_read(&sem->dep_map, 0, 0, _RET_IP_);
/*
* lock for writing
*/
-void down_write(struct rw_semaphore *sem)
+void __sched down_write(struct rw_semaphore *sem)
{
might_sleep();
rwsem_acquire(&sem->dep_map, 0, 0, _RET_IP_);
# define finish_arch_switch(prev) do { } while (0)
#endif
+static inline int task_current(struct rq *rq, struct task_struct *p)
+{
+ return rq->curr == p;
+}
+
#ifndef __ARCH_WANT_UNLOCKED_CTXSW
static inline int task_running(struct rq *rq, struct task_struct *p)
{
- return rq->curr == p;
+ return task_current(rq, p);
}
static inline void prepare_lock_switch(struct rq *rq, struct task_struct *next)
#ifdef CONFIG_SMP
return p->oncpu;
#else
- return rq->curr == p;
+ return task_current(rq, p);
#endif
}
struct rq *rq = cpu_rq(smp_processor_id());
u64 now = sched_clock();
+ touch_softlockup_watchdog();
rq->idle_clock += delta_ns;
/*
* Override the previous timestamp and ignore all
rq = task_rq_lock(p, &flags);
ns = p->se.sum_exec_runtime;
- if (rq->curr == p) {
+ if (task_current(rq, p)) {
update_rq_clock(rq);
delta_exec = rq->clock - p->se.exec_start;
if ((s64)delta_exec > 0)
oldprio = p->prio;
on_rq = p->se.on_rq;
- running = task_running(rq, p);
+ running = task_current(rq, p);
if (on_rq) {
dequeue_task(rq, p, 0);
if (running)
}
update_rq_clock(rq);
on_rq = p->se.on_rq;
- running = task_running(rq, p);
+ running = task_current(rq, p);
if (on_rq) {
deactivate_task(rq, p, 0);
if (running)
update_rq_clock(rq);
- running = task_running(rq, tsk);
+ running = task_current(rq, tsk);
on_rq = tsk->se.on_rq;
if (on_rq) {
if (!initial) {
/* sleeps upto a single latency don't count. */
- if (sched_feat(NEW_FAIR_SLEEPERS) && entity_is_task(se) &&
- task_of(se)->policy != SCHED_BATCH)
+ if (sched_feat(NEW_FAIR_SLEEPERS) && entity_is_task(se))
vruntime -= sysctl_sched_latency;
/* ensure we never gain time by being placed backwards. */
static void task_tick_rt(struct rq *rq, struct task_struct *p)
{
+ update_curr_rt(rq);
+
/*
* RR tasks need a special form of timeslice management.
* FIFO tasks have no timeslices.
};
#ifdef CONFIG_SCHED_DEBUG
-static unsigned long min_sched_granularity_ns = 100000; /* 100 usecs */
-static unsigned long max_sched_granularity_ns = NSEC_PER_SEC; /* 1 second */
-static unsigned long min_wakeup_granularity_ns; /* 0 usecs */
-static unsigned long max_wakeup_granularity_ns = NSEC_PER_SEC; /* 1 second */
+static int min_sched_granularity_ns = 100000; /* 100 usecs */
+static int max_sched_granularity_ns = NSEC_PER_SEC; /* 1 second */
+static int min_wakeup_granularity_ns; /* 0 usecs */
+static int max_wakeup_granularity_ns = NSEC_PER_SEC; /* 1 second */
#endif
static struct ctl_table kern_table[] = {
return 0;
}
-/*
- * Reprogram the broadcast device:
- *
- * Called with tick_broadcast_lock held and interrupts disabled.
- */
-static int tick_broadcast_reprogram(void)
-{
- ktime_t expires = { .tv64 = KTIME_MAX };
- struct tick_device *td;
- int cpu;
-
- /*
- * Find the event which expires next:
- */
- for (cpu = first_cpu(tick_broadcast_oneshot_mask); cpu != NR_CPUS;
- cpu = next_cpu(cpu, tick_broadcast_oneshot_mask)) {
- td = &per_cpu(tick_cpu_device, cpu);
- if (td->evtdev->next_event.tv64 < expires.tv64)
- expires = td->evtdev->next_event;
- }
-
- if (expires.tv64 == KTIME_MAX)
- return 0;
-
- return tick_broadcast_set_event(expires, 0);
-}
-
/*
* Handle oneshot mode broadcasting
*/
{
struct tick_device *td;
cpumask_t mask;
- ktime_t now;
+ ktime_t now, next_event;
int cpu;
spin_lock(&tick_broadcast_lock);
again:
dev->next_event.tv64 = KTIME_MAX;
+ next_event.tv64 = KTIME_MAX;
mask = CPU_MASK_NONE;
now = ktime_get();
/* Find all expired events */
td = &per_cpu(tick_cpu_device, cpu);
if (td->evtdev->next_event.tv64 <= now.tv64)
cpu_set(cpu, mask);
+ else if (td->evtdev->next_event.tv64 < next_event.tv64)
+ next_event.tv64 = td->evtdev->next_event.tv64;
}
/*
- * Wakeup the cpus which have an expired event. The broadcast
- * device is reprogrammed in the return from idle code.
+ * Wakeup the cpus which have an expired event.
+ */
+ tick_do_broadcast(mask);
+
+ /*
+ * Two reasons for reprogram:
+ *
+ * - The global event did not expire any CPU local
+ * events. This happens in dyntick mode, as the maximum PIT
+ * delta is quite small.
+ *
+ * - There are pending events on sleeping CPUs which were not
+ * in the event mask
*/
- if (!tick_do_broadcast(mask)) {
+ if (next_event.tv64 != KTIME_MAX) {
/*
- * The global event did not expire any CPU local
- * events. This happens in dyntick mode, as the
- * maximum PIT delta is quite small.
+ * Rearm the broadcast device. If event expired,
+ * repeat the above
*/
- if (tick_broadcast_reprogram())
+ if (tick_broadcast_set_event(next_event, 0))
goto again;
}
spin_unlock(&tick_broadcast_lock);
*/
static struct lock_class_key base_lock_keys[NR_CPUS];
-static int __devinit init_timers_cpu(int cpu)
+static int __cpuinit init_timers_cpu(int cpu)
{
int j;
tvec_base_t *base;
- static char __devinitdata tvec_base_done[NR_CPUS];
+ static char __cpuinitdata tvec_base_done[NR_CPUS];
if (!tvec_base_done[cpu]) {
static char boot_done;
/*
* wait for a lock to be granted
*/
-static struct rw_semaphore *
+static struct rw_semaphore __sched *
rwsem_down_failed_common(struct rw_semaphore *sem,
struct rwsem_waiter *waiter, signed long adjustment)
{
mapping->nrpages--;
__dec_zone_page_state(page, NR_FILE_PAGES);
BUG_ON(page_mapped(page));
+
+ /*
+ * Some filesystems seem to re-dirty the page even after
+ * the VM has canceled the dirty bit (eg ext3 journaling).
+ *
+ * Fix it up by doing a final dirty accounting check after
+ * having removed the page entirely.
+ */
+ if (PageDirty(page) && mapping_cap_account_dirty(mapping)) {
+ dec_zone_page_state(page, NR_FILE_DIRTY);
+ dec_bdi_stat(mapping->backing_dev_info, BDI_RECLAIMABLE);
+ }
}
void remove_from_page_cache(struct page *page)
projects / linux-2.6-block.git / commitdiff