ARM: dts: imx: Cleanup style around assignment operator
authorKrzysztof Kozlowski <krzk@kernel.org>
Sat, 27 Jul 2019 14:26:40 +0000 (16:26 +0200)
committerShawn Guo <shawnguo@kernel.org>
Sat, 3 Aug 2019 14:49:56 +0000 (16:49 +0200)
Use a space before and after assignment operator to have consistent
style.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/imx6sll.dtsi
arch/arm/boot/dts/imx6sx.dtsi
arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi
arch/arm/boot/dts/imx6ul.dtsi
arch/arm/boot/dts/imx7d.dtsi
arch/arm/boot/dts/imx7s.dtsi
arch/arm/boot/dts/imx7ulp.dtsi

index 365e591e7878fda1cad9a33a0388d21cf4c339e4..13c7ba7fa6bc9e5ce8df6bb1d186ff8e6d845525 100644 (file)
                                        compatible = "fsl,imx6sl-uart", "fsl,imx6q-uart",
                                                     "fsl,imx21-uart";
                                        reg = <0x02018000 0x4000>;
-                                       interrupts =<GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+                                       interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
                                        dmas = <&sdma 31 4 0>, <&sdma 32 4 0>;
                                        dma-names = "rx", "tx";
                                        clocks = <&clks IMX6SLL_CLK_UART4_IPG>,
                                compatible = "fsl,imx6sll-uart", "fsl,imx6q-uart",
                                             "fsl,imx21-uart";
                                reg = <0x021f4000 0x4000>;
-                               interrupts =<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
                                dmas = <&sdma 33 4 0>, <&sdma 34 4 0>;
                                dma-names = "rx", "tx";
                                clocks = <&clks IMX6SLL_CLK_UART5_IPG>,
index fe00f9a8accd5ce161e4a434b9bd1746b338da8a..531a52c1e987e58a5aea405e2504e6dbaa4368e9 100644 (file)
                                         <&clks IMX6SX_CLK_ENET_PTP>;
                                clock-names = "ipg", "ahb", "ptp",
                                              "enet_clk_ref", "enet_out";
-                               fsl,num-tx-queues=<3>;
-                               fsl,num-rx-queues=<3>;
+                               fsl,num-tx-queues = <3>;
+                               fsl,num-rx-queues = <3>;
                                status = "disabled";
                        };
 
index 92bf916740565ed54c0c9f54c7f9157d9bb85a61..41f3b7f62bbf7a7d26ec88abf3ee03acb619141d 100644 (file)
@@ -69,7 +69,7 @@
 
 &i2c1 {
        pinctrl-names = "default";
-       pinctrl-0 =<&pinctrl_i2c1>;
+       pinctrl-0 = <&pinctrl_i2c1>;
        clock-frequency = <100000>;
        status = "okay";
 
index 6dff2784abe604fe780b29d17709fdd7df0c6dca..228d220131325fecdc2777d506179189958b2eda 100644 (file)
                                         <&clks IMX6UL_CLK_ENET2_REF_125M>;
                                clock-names = "ipg", "ahb", "ptp",
                                              "enet_clk_ref", "enet_out";
-                               fsl,num-tx-queues=<1>;
-                               fsl,num-rx-queues=<1>;
+                               fsl,num-tx-queues = <1>;
+                               fsl,num-rx-queues = <1>;
                                status = "disabled";
                        };
 
                                         <&clks IMX6UL_CLK_ENET_REF>;
                                clock-names = "ipg", "ahb", "ptp",
                                              "enet_clk_ref", "enet_out";
-                               fsl,num-tx-queues=<1>;
-                               fsl,num-rx-queues=<1>;
+                               fsl,num-tx-queues = <1>;
+                               fsl,num-rx-queues = <1>;
                                status = "disabled";
                        };
 
                                         <&clks IMX6UL_CLK_USDHC1>,
                                         <&clks IMX6UL_CLK_USDHC1>;
                                clock-names = "ipg", "ahb", "per";
-                               fsl,tuning-step= <2>;
+                               fsl,tuning-step = <2>;
                                fsl,tuning-start-tap = <20>;
                                bus-width = <4>;
                                status = "disabled";
                                         <&clks IMX6UL_CLK_USDHC2>;
                                clock-names = "ipg", "ahb", "per";
                                bus-width = <4>;
-                               fsl,tuning-step= <2>;
+                               fsl,tuning-step = <2>;
                                fsl,tuning-start-tap = <20>;
                                status = "disabled";
                        };
index 42528d2812a2eb758b031769e0fd032ba04f5c89..9c8dd32cc035f8b9ad419c773f0d48b9a5fb4854 100644 (file)
                        <&clks IMX7D_ENET_PHY_REF_ROOT_CLK>;
                clock-names = "ipg", "ahb", "ptp",
                        "enet_clk_ref", "enet_out";
-               fsl,num-tx-queues=<3>;
-               fsl,num-rx-queues=<3>;
+               fsl,num-tx-queues = <3>;
+               fsl,num-rx-queues = <3>;
                status = "disabled";
        };
 
index c1a4fff5ceda9791603a4ce23e142fd539b443da..710f850e785c6cbb465faa1697e15a52de378171 100644 (file)
                compatible = "fsl,imx7d-tempmon";
                interrupt-parent = <&gpc>;
                interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
-               fsl,tempmon =<&anatop>;
+               fsl,tempmon = <&anatop>;
                nvmem-cells = <&tempmon_calib>,
                        <&tempmon_temp_grade>;
                nvmem-cell-names = "calib", "temp_grade";
                                        <&clks IMX7D_ENET_PHY_REF_ROOT_CLK>;
                                clock-names = "ipg", "ahb", "ptp",
                                        "enet_clk_ref", "enet_out";
-                               fsl,num-tx-queues=<3>;
-                               fsl,num-rx-queues=<3>;
+                               fsl,num-tx-queues = <3>;
+                               fsl,num-rx-queues = <3>;
                                status = "disabled";
                        };
                };
index f689ce596080342e21d5d5db3e709d73863b35f0..c7c96fe0c80a18517ac2a335e4f5bb859224c1a2 100644 (file)
                        clocks = <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>,
                                 <&scg1 IMX7ULP_CLK_NIC1_DIV>,
                                 <&pcc2 IMX7ULP_CLK_USDHC0>;
-                       clock-names ="ipg", "ahb", "per";
+                       clock-names = "ipg", "ahb", "per";
                        assigned-clocks = <&pcc2 IMX7ULP_CLK_USDHC0>;
                        assigned-clock-parents = <&scg1 IMX7ULP_CLK_NIC1_DIV>;
                        bus-width = <4>;
                        fsl,tuning-start-tap = <20>;
-                       fsl,tuning-step= <2>;
+                       fsl,tuning-step = <2>;
                        status = "disabled";
                };
 
                        clocks = <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>,
                                 <&scg1 IMX7ULP_CLK_NIC1_DIV>,
                                 <&pcc2 IMX7ULP_CLK_USDHC1>;
-                       clock-names ="ipg", "ahb", "per";
+                       clock-names = "ipg", "ahb", "per";
                        assigned-clocks = <&pcc2 IMX7ULP_CLK_USDHC1>;
                        assigned-clock-parents = <&scg1 IMX7ULP_CLK_NIC1_DIV>;
                        bus-width = <4>;
                        fsl,tuning-start-tap = <20>;
-                       fsl,tuning-step= <2>;
+                       fsl,tuning-step = <2>;
                        status = "disabled";
                };