drm/amdgpu/gfx12: set MQD as appriopriate for queue types
authorAlex Deucher <alexander.deucher@amd.com>
Tue, 24 Jun 2025 15:38:14 +0000 (11:38 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 27 Aug 2025 17:59:53 +0000 (13:59 -0400)
Set the MQD as appropriate for the kernel vs user queues.

Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 7b9110f2897957efd9715b52fc01986509729db3)
Cc: stable@vger.kernel.org
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

index 3e138527d534db13f2c8d54f2ccdd9569bd76488..fd44d5503e282537408daad7d74bef6d93f30b3e 100644 (file)
@@ -3026,6 +3026,8 @@ static int gfx_v12_0_gfx_mqd_init(struct amdgpu_device *adev, void *m,
 #endif
        if (prop->tmz_queue)
                tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, TMZ_MATCH, 1);
+       if (!prop->kernel_queue)
+               tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, RB_NON_PRIV, 1);
        mqd->cp_gfx_hqd_cntl = tmp;
 
        /* set up cp_doorbell_control */
@@ -3175,8 +3177,10 @@ static int gfx_v12_0_compute_mqd_init(struct amdgpu_device *adev, void *m,
                            (order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1));
        tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, UNORD_DISPATCH, 1);
        tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, TUNNEL_DISPATCH, 0);
-       tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);
-       tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, KMD_QUEUE, 1);
+       if (prop->kernel_queue) {
+               tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);
+               tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, KMD_QUEUE, 1);
+       }
        if (prop->tmz_queue)
                tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, TMZ, 1);
        mqd->cp_hqd_pq_control = tmp;