drm/amd/display: Clean up some inconsistent indenting
authorJiapeng Chong <jiapeng.chong@linux.alibaba.com>
Tue, 26 Jul 2022 07:25:48 +0000 (15:25 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 28 Jul 2022 20:05:15 +0000 (16:05 -0400)
No functional modification involved.

smatch warnings:

drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_mpc.c:305 mpc20_get_ogam_current() warn: inconsistent indenting.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c

index 15734db0cdea41c541d03052e8e401fa80e71484..3d307dd58e9af70877f296db247b3787b3ce9676 100644 (file)
@@ -299,24 +299,24 @@ static enum dc_lut_mode mpc20_get_ogam_current(struct mpc *mpc, int mpcc_id)
        uint32_t state_mode;
        struct dcn20_mpc *mpc20 = TO_DCN20_MPC(mpc);
 
-       REG_GET(MPCC_OGAM_LUT_RAM_CONTROL[mpcc_id],
-                       MPCC_OGAM_CONFIG_STATUS, &state_mode);
-
-               switch (state_mode) {
-               case 0:
-                       mode = LUT_BYPASS;
-                       break;
-               case 1:
-                       mode = LUT_RAM_A;
-                       break;
-               case 2:
-                       mode = LUT_RAM_B;
-                       break;
-               default:
-                       mode = LUT_BYPASS;
-                       break;
-               }
-               return mode;
+       REG_GET(MPCC_OGAM_LUT_RAM_CONTROL[mpcc_id], MPCC_OGAM_CONFIG_STATUS, &state_mode);
+
+       switch (state_mode) {
+       case 0:
+               mode = LUT_BYPASS;
+               break;
+       case 1:
+               mode = LUT_RAM_A;
+               break;
+       case 2:
+               mode = LUT_RAM_B;
+               break;
+       default:
+               mode = LUT_BYPASS;
+               break;
+       }
+
+       return mode;
 }
 
 static void mpc2_program_lutb(struct mpc *mpc, int mpcc_id,