drm/amd/powerplay: modify VddcPhase value for polaris kicker

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smc.c b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smc.c
index 0e26900e459e860cbb6f1151881f8b63aee8a80d..c6c3c5751ac76a7372faa97237e815755465aeb5 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smc.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smc.c
@@ -494,6 +494,7 @@ static int polaris10_populate_ulv_level(struct pp_hwmgr *hwmgr,
        struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
        struct phm_ppt_v1_information *table_info =
                        (struct phm_ppt_v1_information *)(hwmgr->pptable);
+       struct pp_smumgr *smumgr = hwmgr->smumgr;
 
        state->CcPwrDynRm = 0;
        state->CcPwrDynRm1 = 0;
@@ -502,7 +503,10 @@ static int polaris10_populate_ulv_level(struct pp_hwmgr *hwmgr,
        state->VddcOffsetVid = (uint8_t)(table_info->us_ulv_voltage_offset *
                        VOLTAGE_VID_OFFSET_SCALE2 / VOLTAGE_VID_OFFSET_SCALE1);
 
-       state->VddcPhase = (data->vddc_phase_shed_control) ? 0 : 1;
+       if (smumgr->is_kicker)
+               state->VddcPhase = data->vddc_phase_shed_control ^ 0x3;
+       else
+               state->VddcPhase = (data->vddc_phase_shed_control) ? 0 : 1;
 
        CONVERT_FROM_HOST_TO_SMC_UL(state->CcPwrDynRm);
        CONVERT_FROM_HOST_TO_SMC_UL(state->CcPwrDynRm1);