arm64: dts: ti: k3-am6*: Fix ti,clkbuf-sel property in MMC nodes
authorJudith Mendez <jm@ti.com>
Tue, 13 Feb 2024 23:56:59 +0000 (17:56 -0600)
committerVignesh Raghavendra <vigneshr@ti.com>
Mon, 19 Feb 2024 06:32:47 +0000 (12:02 +0530)
Move ti,clkbuf-sel property above the OTAP/ITAP delay values.
While there is no error with where it is currently at, it is
easier to read the MMC node if ti,clkbuf-sel is located above
the OTAP/ITAP delay values consistently across MMC nodes.

Add missing ti,clkbuf-sel for MMC0 in k3-am64-main.

Signed-off-by: Judith Mendez <jm@ti.com>
Tested-by: Wadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20240213235701.2438513-8-jm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
arch/arm64/boot/dts/ti/k3-am62-main.dtsi
arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
arch/arm64/boot/dts/ti/k3-am64-main.dtsi

index 172482a87ae23b5bea9a6f208b3598dab2b9755e..c8902a3bf5435111789e5fefbc92cfae05ff0e60 100644 (file)
                power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
                clocks = <&k3_clks 58 5>, <&k3_clks 58 6>;
                clock-names = "clk_ahb", "clk_xin";
+               ti,clkbuf-sel = <0x7>;
                ti,otap-del-sel-legacy = <0x8>;
                ti,otap-del-sel-sd-hs = <0x0>;
                ti,otap-del-sel-sdr12 = <0x0>;
                ti,itap-del-sel-sd-hs = <0x1>;
                ti,itap-del-sel-sdr12 = <0xa>;
                ti,itap-del-sel-sdr25 = <0x1>;
-               ti,clkbuf-sel = <0x7>;
                bus-width = <4>;
                status = "disabled";
        };
                power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>;
                clocks = <&k3_clks 184 5>, <&k3_clks 184 6>;
                clock-names = "clk_ahb", "clk_xin";
+               ti,clkbuf-sel = <0x7>;
                ti,otap-del-sel-legacy = <0x8>;
                ti,otap-del-sel-sd-hs = <0x0>;
                ti,otap-del-sel-sdr12 = <0x0>;
                ti,itap-del-sel-sd-hs = <0xa>;
                ti,itap-del-sel-sdr12 = <0xa>;
                ti,itap-del-sel-sdr25 = <0x1>;
-               ti,clkbuf-sel = <0x7>;
                status = "disabled";
        };
 
index 9e3840c4f9b5b926955ed96bea0da0fa5b0443c0..2024d7193c845604a5fa5bb4a90f5bc53cd006c9 100644 (file)
                power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
                clocks = <&k3_clks 58 5>, <&k3_clks 58 6>;
                clock-names = "clk_ahb", "clk_xin";
+               ti,clkbuf-sel = <0x7>;
                ti,otap-del-sel-legacy = <0x0>;
                ti,otap-del-sel-sd-hs = <0x0>;
                ti,otap-del-sel-sdr12 = <0xf>;
                ti,itap-del-sel-sd-hs = <0x0>;
                ti,itap-del-sel-sdr12 = <0x0>;
                ti,itap-del-sel-sdr25 = <0x0>;
-               ti,clkbuf-sel = <0x7>;
                bus-width = <4>;
                no-1-8-v;
                status = "disabled";
index 5c470ee359cb9f6755ae4e851974e0458f01c6af..8a2b3504e916838df435e815d834e35042225f08 100644 (file)
                clock-names = "clk_ahb", "clk_xin";
                mmc-ddr-1_8v;
                mmc-hs200-1_8v;
+               ti,clkbuf-sel = <0x7>;
                ti,trm-icp = <0x2>;
                ti,otap-del-sel-legacy = <0x0>;
                ti,otap-del-sel-mmc-hs = <0x0>;
                power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
                clocks = <&k3_clks 58 3>, <&k3_clks 58 4>;
                clock-names = "clk_ahb", "clk_xin";
+               ti,clkbuf-sel = <0x7>;
                ti,otap-del-sel-legacy = <0x0>;
                ti,otap-del-sel-sd-hs = <0x0>;
                ti,otap-del-sel-sdr12 = <0xf>;
                ti,itap-del-sel-sd-hs = <0x0>;
                ti,itap-del-sel-sdr12 = <0x0>;
                ti,itap-del-sel-sdr25 = <0x0>;
-               ti,clkbuf-sel = <0x7>;
                status = "disabled";
        };