spi_set_clk(dws, clk_div);
dws->current_freq = speed_hz;
}
+
+ /* Update RX sample delay if required */
+ if (dws->cur_rx_sample_dly != chip->rx_sample_dly) {
+ dw_writel(dws, DW_SPI_RX_SAMPLE_DLY, chip->rx_sample_dly);
+ dws->cur_rx_sample_dly = chip->rx_sample_dly;
+ }
}
static int dw_spi_transfer_one(struct spi_controller *master,
struct spi_device *spi, struct spi_transfer *transfer)
{
struct dw_spi *dws = spi_controller_get_devdata(master);
- struct chip_data *chip = spi_get_ctldata(spi);
u8 imask = 0;
u16 txlevel = 0;
int ret;
if (master->can_dma && master->can_dma(master, spi, transfer))
dws->dma_mapped = master->cur_msg_mapped;
- /* Update RX sample delay if required */
- if (dws->cur_rx_sample_dly != chip->rx_sample_dly) {
- dw_writel(dws, DW_SPI_RX_SAMPLE_DLY, chip->rx_sample_dly);
- dws->cur_rx_sample_dly = chip->rx_sample_dly;
- }
-
/* For poll mode just disable all interrupts */
spi_mask_intr(dws, 0xff);