MIPS: Octeon: Check all CCAs in cvmx_write_csr.

The current code only checks CCA of 0 when deciding if a dummy read is
needed.  Since the kernel can (and does) use other CCAs we need to
mask out the CCA bits from the address.  Since the address constant
now fits in 16 bits, there is an added benefit that smaller code is
generated.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/include/asm/octeon/cvmx.h b/arch/mips/include/asm/octeon/cvmx.h
index e31e3fe14f8a446a8d94758bb3c37f89bbdc91ad..9d9381e2e3d890c9e82a62cd56acfee2319fb306 100644 (file)
--- a/arch/mips/include/asm/octeon/cvmx.h
+++ b/arch/mips/include/asm/octeon/cvmx.h
@@ -271,7 +271,7 @@ static inline void cvmx_write_csr(uint64_t csr_addr, uint64_t val)
         * what RSL read we do, so we choose CVMX_MIO_BOOT_BIST_STAT
         * because it is fast and harmless.
         */
-       if ((csr_addr >> 40) == (0x800118))
+       if (((csr_addr >> 40) & 0x7ffff) == (0x118))
                cvmx_read64(CVMX_MIO_BOOT_BIST_STAT);
 }