scsi: ufs: ufs-qcom: Add support to dump testbus registers
authorManish Pandey <quic_mapa@quicinc.com>
Fri, 11 Apr 2025 12:13:45 +0000 (17:43 +0530)
committerMartin K. Petersen <martin.petersen@oracle.com>
Tue, 29 Apr 2025 02:00:34 +0000 (22:00 -0400)
Add support to dump testbus registers to enhance debugging capabilities
for the Qualcomm UFS Host Controller.

Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
Link: https://lore.kernel.org/r/20250411121345.16859-4-quic_mapa@quicinc.com
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
drivers/ufs/host/ufs-qcom.c

index 9ac3ed5dc87583e5dc21806b21fbe60fa30e7ab2..6e0e6323983be7d33146ccf61f9df7dda10c584d 100644 (file)
@@ -5,6 +5,7 @@
 
 #include <linux/acpi.h>
 #include <linux/clk.h>
+#include <linux/cleanup.h>
 #include <linux/delay.h>
 #include <linux/devfreq.h>
 #include <linux/gpio/consumer.h>
@@ -98,6 +99,24 @@ static const struct __ufs_qcom_bw_table {
        [MODE_MAX][0][0]                    = { 7643136,        819200 },
 };
 
+static const struct {
+       int nminor;
+       char *prefix;
+} testbus_info[TSTBUS_MAX] = {
+       [TSTBUS_UAWM]     = {32, "TSTBUS_UAWM"},
+       [TSTBUS_UARM]     = {32, "TSTBUS_UARM"},
+       [TSTBUS_TXUC]     = {32, "TSTBUS_TXUC"},
+       [TSTBUS_RXUC]     = {32, "TSTBUS_RXUC"},
+       [TSTBUS_DFC]      = {32, "TSTBUS_DFC"},
+       [TSTBUS_TRLUT]    = {32, "TSTBUS_TRLUT"},
+       [TSTBUS_TMRLUT]   = {32, "TSTBUS_TMRLUT"},
+       [TSTBUS_OCSC]     = {32, "TSTBUS_OCSC"},
+       [TSTBUS_UTP_HCI]  = {32, "TSTBUS_UTP_HCI"},
+       [TSTBUS_COMBINED] = {32, "TSTBUS_COMBINED"},
+       [TSTBUS_WRAPPER]  = {32, "TSTBUS_WRAPPER"},
+       [TSTBUS_UNIPRO]   = {256, "TSTBUS_UNIPRO"},
+};
+
 static void ufs_qcom_get_default_testbus_cfg(struct ufs_qcom_host *host);
 static int ufs_qcom_set_core_clk_ctrl(struct ufs_hba *hba, unsigned long freq);
 
@@ -1566,6 +1585,32 @@ int ufs_qcom_testbus_config(struct ufs_qcom_host *host)
        return 0;
 }
 
+static void ufs_qcom_dump_testbus(struct ufs_hba *hba)
+{
+       struct ufs_qcom_host *host = ufshcd_get_variant(hba);
+       int i, j, nminor = 0, testbus_len = 0;
+       u32 *testbus __free(kfree) = NULL;
+       char *prefix;
+
+       testbus = kmalloc_array(256, sizeof(u32), GFP_KERNEL);
+       if (!testbus)
+               return;
+
+       for (j = 0; j < TSTBUS_MAX; j++) {
+               nminor = testbus_info[j].nminor;
+               prefix = testbus_info[j].prefix;
+               host->testbus.select_major = j;
+               testbus_len = nminor * sizeof(u32);
+               for (i = 0; i < nminor; i++) {
+                       host->testbus.select_minor = i;
+                       ufs_qcom_testbus_config(host);
+                       testbus[i] = ufshcd_readl(hba, UFS_TEST_BUS);
+               }
+               print_hex_dump(KERN_ERR, prefix, DUMP_PREFIX_OFFSET,
+                              16, 4, testbus, testbus_len, false);
+       }
+}
+
 static int ufs_qcom_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
                              const char *prefix, enum ufshcd_res id)
 {
@@ -1688,6 +1733,11 @@ static void ufs_qcom_dump_dbg_regs(struct ufs_hba *hba)
                /* Dump MCQ Host Vendor Specific Registers */
                if (hba->mcq_enabled)
                        ufs_qcom_dump_mcq_hci_regs(hba);
+
+               /* voluntarily yield the CPU as we are dumping too much data */
+               ufshcd_dump_regs(hba, UFS_TEST_BUS, 4, "UFS_TEST_BUS ");
+               cond_resched();
+               ufs_qcom_dump_testbus(hba);
        }
 }