drm/xe/doc: Wire up PCIe Gen5 limitations
authorRaag Jadav <raag.jadav@intel.com>
Tue, 6 May 2025 05:48:35 +0000 (11:18 +0530)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Wed, 7 May 2025 19:31:11 +0000 (15:31 -0400)
Append PCIe Gen5 limitations to xe_firmware document.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://lore.kernel.org/r/20250506054835.3395220-4-raag.jadav@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Documentation/gpu/xe/xe_firmware.rst

index afcb561cd37db227b3d0a22faea599545d4ff883..5d23e9f27391485d5ecef3d4e707726636fa0c2a 100644 (file)
@@ -31,6 +31,12 @@ GuC Power Conservation (PC)
 .. kernel-doc:: drivers/gpu/drm/xe/xe_guc_pc.c
    :doc: GuC Power Conservation (PC)
 
+PCIe Gen5 Limitations
+=====================
+
+.. kernel-doc:: drivers/gpu/drm/xe/xe_device_sysfs.c
+   :doc: PCIe Gen5 Limitations
+
 Internal API
 ============