arm64: dts: qcom: qrb2210-rb1: Enable CAN bus controller

Enable the Microchip mcp2518fd hosted on the SPI5 bus.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231125-topic-rb1_feat-v3-11-4cbb567743bb@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts
index ac6584164058e7d2a1602c22a0b206b9ee5ddd12..ac597eb3fe9dccf5a77ec9f2bf34e7c22a99c57f 100644 (file)
--- a/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts
+++ b/arch/arm64/boot/dts/qcom/qrb2210-rb1.dts
@@ -23,6 +23,14 @@
                stdout-path = "serial0:115200n8";
        };
 
+       clocks {
+               clk40M: can-clk {
+                       compatible = "fixed-clock";
+                       clock-frequency = <40000000>;
+                       #clock-cells = <0>;
+               };
+       };
+
        gpio-keys {
                compatible = "gpio-keys";
                label = "gpio-keys";
@@ -449,6 +457,20 @@
        status = "okay";
 };
 
+&spi5 {
+       status = "okay";
+
+       can@0 {
+               compatible = "microchip,mcp2518fd";
+               reg = <0>;
+               interrupts-extended = <&tlmm 39 IRQ_TYPE_LEVEL_LOW>;
+               clocks = <&clk40M>;
+               spi-max-frequency = <10000000>;
+               vdd-supply = <&vdc_5v>;
+               xceiver-supply = <&vdc_5v>;
+       };
+};
+
 &tlmm {
        lt9611_rst_pin: lt9611-rst-state {
                pins = "gpio41";