iio: adc: stm32-dfsdm-adc: make use of regmap_clear_bits(), regmap_set_bits()

Instead of using regmap_update_bits() and passing the mask twice, use
regmap_set_bits().

Instead of using regmap_update_bits() and passing val = 0, use
regmap_clear_bits().

Suggested-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Signed-off-by: Trevor Gamblin <tgamblin@baylibre.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Link: https://patch.msgid.link/20240617-review-v3-18-88d1338c4cca@baylibre.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

diff --git a/drivers/iio/adc/stm32-dfsdm-adc.c b/drivers/iio/adc/stm32-dfsdm-adc.c
index 9a47d2c87f05a3c0e40774f1cf1cf2979ba2d117..fabd654245f566c1761c3c6efbb4d445a8b13457 100644 (file)
--- a/drivers/iio/adc/stm32-dfsdm-adc.c
+++ b/drivers/iio/adc/stm32-dfsdm-adc.c
@@ -759,8 +759,7 @@ static int stm32_dfsdm_start_conv(struct iio_dev *indio_dev,
        return 0;
 
 filter_unconfigure:
-       regmap_update_bits(regmap, DFSDM_CR1(adc->fl_id),
-                          DFSDM_CR1_CFG_MASK, 0);
+       regmap_clear_bits(regmap, DFSDM_CR1(adc->fl_id), DFSDM_CR1_CFG_MASK);
 stop_channels:
        stm32_dfsdm_stop_channel(indio_dev);
 
@@ -774,8 +773,7 @@ static void stm32_dfsdm_stop_conv(struct iio_dev *indio_dev)
 
        stm32_dfsdm_stop_filter(adc->dfsdm, adc->fl_id);
 
-       regmap_update_bits(regmap, DFSDM_CR1(adc->fl_id),
-                          DFSDM_CR1_CFG_MASK, 0);
+       regmap_clear_bits(regmap, DFSDM_CR1(adc->fl_id), DFSDM_CR1_CFG_MASK);
 
        stm32_dfsdm_stop_channel(indio_dev);
 }
@@ -951,16 +949,14 @@ static int stm32_dfsdm_adc_dma_start(struct iio_dev *indio_dev)
 
        if (adc->nconv == 1 && !indio_dev->trig) {
                /* Enable regular DMA transfer*/
-               ret = regmap_update_bits(adc->dfsdm->regmap,
-                                        DFSDM_CR1(adc->fl_id),
-                                        DFSDM_CR1_RDMAEN_MASK,
-                                        DFSDM_CR1_RDMAEN_MASK);
+               ret = regmap_set_bits(adc->dfsdm->regmap,
+                                     DFSDM_CR1(adc->fl_id),
+                                     DFSDM_CR1_RDMAEN_MASK);
        } else {
                /* Enable injected DMA transfer*/
-               ret = regmap_update_bits(adc->dfsdm->regmap,
-                                        DFSDM_CR1(adc->fl_id),
-                                        DFSDM_CR1_JDMAEN_MASK,
-                                        DFSDM_CR1_JDMAEN_MASK);
+               ret = regmap_set_bits(adc->dfsdm->regmap,
+                                     DFSDM_CR1(adc->fl_id),
+                                     DFSDM_CR1_JDMAEN_MASK);
        }
 
        if (ret < 0)
@@ -981,8 +977,8 @@ static void stm32_dfsdm_adc_dma_stop(struct iio_dev *indio_dev)
        if (!adc->dma_chan)
                return;
 
-       regmap_update_bits(adc->dfsdm->regmap, DFSDM_CR1(adc->fl_id),
-                          DFSDM_CR1_RDMAEN_MASK | DFSDM_CR1_JDMAEN_MASK, 0);
+       regmap_clear_bits(adc->dfsdm->regmap, DFSDM_CR1(adc->fl_id),
+                         DFSDM_CR1_RDMAEN_MASK | DFSDM_CR1_JDMAEN_MASK);
        dmaengine_terminate_all(adc->dma_chan);
 }
 
@@ -1305,9 +1301,8 @@ static irqreturn_t stm32_dfsdm_irq(int irq, void *arg)
        if (status & DFSDM_ISR_ROVRF_MASK) {
                if (int_en & DFSDM_CR2_ROVRIE_MASK)
                        dev_warn(&indio_dev->dev, "Overrun detected\n");
-               regmap_update_bits(regmap, DFSDM_ICR(adc->fl_id),
-                                  DFSDM_ICR_CLRROVRF_MASK,
-                                  DFSDM_ICR_CLRROVRF_MASK);
+               regmap_set_bits(regmap, DFSDM_ICR(adc->fl_id),
+                               DFSDM_ICR_CLRROVRF_MASK);
        }
 
        return IRQ_HANDLED;