drm/amdgpu/mes: consolidate on a single mes reset callback

Use the legacy one as it covers both kernel queues and
user queues.

Reviewed-by: Sunil Khatri <sunil.khatri@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
index 2103c8dcd7f3eacd3a915f61a968ea15804ae79e..5de0d6c528f4e49f62c22fb57e9a89bb49a96fab 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
@@ -335,7 +335,7 @@ int amdgpu_mes_reset_legacy_queue(struct amdgpu_device *adev,
                                  unsigned int vmid,
                                  bool use_mmio)
 {
-       struct mes_reset_legacy_queue_input queue_input;
+       struct mes_reset_queue_input queue_input;
        int r;
 
        memset(&queue_input, 0, sizeof(queue_input));
@@ -349,8 +349,10 @@ int amdgpu_mes_reset_legacy_queue(struct amdgpu_device *adev,
        queue_input.wptr_addr = ring->wptr_gpu_addr;
        queue_input.vmid = vmid;
        queue_input.use_mmio = use_mmio;
+       if (ring->funcs->type == AMDGPU_RING_TYPE_GFX)
+               queue_input.legacy_gfx = true;
 
-       r = adev->mes.funcs->reset_legacy_queue(&adev->mes, &queue_input);
+       r = adev->mes.funcs->reset_hw_queue(&adev->mes, &queue_input);
        if (r)
                DRM_ERROR("failed to reset legacy queue\n");
 

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
index af6e341f6411e3d34d2b76c5386019deb88e5604..e98b0d892a593e7314938cec341f02f8096c1777 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
@@ -266,7 +266,7 @@ struct mes_resume_gang_input {
        uint64_t        gang_context_addr;
 };
 
-struct mes_reset_legacy_queue_input {
+struct mes_reset_queue_input {
        uint32_t                           queue_type;
        uint32_t                           doorbell_offset;
        bool                               use_mmio;
@@ -276,6 +276,7 @@ struct mes_reset_legacy_queue_input {
        uint64_t                           mqd_addr;
        uint64_t                           wptr_addr;
        uint32_t                           vmid;
+       bool                               legacy_gfx;
 };
 
 enum mes_misc_opcode {
@@ -363,8 +364,8 @@ struct amdgpu_mes_funcs {
        int (*misc_op)(struct amdgpu_mes *mes,
                       struct mes_misc_op_input *input);
 
-       int (*reset_legacy_queue)(struct amdgpu_mes *mes,
-                                 struct mes_reset_legacy_queue_input *input);
+       int (*reset_hw_queue)(struct amdgpu_mes *mes,
+                             struct mes_reset_queue_input *input);
 };
 
 #define amdgpu_mes_kiq_hw_init(adev) (adev)->mes.kiq_hw_init((adev))

diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
index 5ce62a3f01e7dfda3c4c123b76d13831b024cb24..c9eba537de0940ddf56d97544dca10b1392bdfeb 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
@@ -746,8 +746,8 @@ static int mes_v11_0_set_hw_resources_1(struct amdgpu_mes *mes)
                        offsetof(union MESAPI_SET_HW_RESOURCES_1, api_status));
 }
 
-static int mes_v11_0_reset_legacy_queue(struct amdgpu_mes *mes,
-                                       struct mes_reset_legacy_queue_input *input)
+static int mes_v11_0_reset_hw_queue(struct amdgpu_mes *mes,
+                                   struct mes_reset_queue_input *input)
 {
        union MESAPI__RESET mes_reset_queue_pkt;
 
@@ -765,7 +765,7 @@ static int mes_v11_0_reset_legacy_queue(struct amdgpu_mes *mes,
        mes_reset_queue_pkt.queue_type =
                convert_to_mes_queue_type(input->queue_type);
 
-       if (mes_reset_queue_pkt.queue_type == MES_QUEUE_TYPE_GFX) {
+       if (input->legacy_gfx) {
                mes_reset_queue_pkt.reset_legacy_gfx = 1;
                mes_reset_queue_pkt.pipe_id_lp = input->pipe_id;
                mes_reset_queue_pkt.queue_id_lp = input->queue_id;
@@ -791,7 +791,7 @@ static const struct amdgpu_mes_funcs mes_v11_0_funcs = {
        .suspend_gang = mes_v11_0_suspend_gang,
        .resume_gang = mes_v11_0_resume_gang,
        .misc_op = mes_v11_0_misc_op,
-       .reset_legacy_queue = mes_v11_0_reset_legacy_queue,
+       .reset_hw_queue = mes_v11_0_reset_hw_queue,
 };
 
 static int mes_v11_0_allocate_ucode_buffer(struct amdgpu_device *adev,

diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
index a3391810c897c35116e869cb1afa681c5c25be9a..f9f2fbc0a7166113be7f5d3040fbd7638fa9f68e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
@@ -836,8 +836,8 @@ static void mes_v12_0_enable_unmapped_doorbell_handling(
        WREG32_SOC15(GC, 0, regCP_UNMAPPED_DOORBELL, data);
 }
 
-static int mes_v12_0_reset_legacy_queue(struct amdgpu_mes *mes,
-                                       struct mes_reset_legacy_queue_input *input)
+static int mes_v12_0_reset_hw_queue(struct amdgpu_mes *mes,
+                                   struct mes_reset_queue_input *input)
 {
        union MESAPI__RESET mes_reset_queue_pkt;
        int pipe;
@@ -856,7 +856,7 @@ static int mes_v12_0_reset_legacy_queue(struct amdgpu_mes *mes,
        mes_reset_queue_pkt.queue_type =
                convert_to_mes_queue_type(input->queue_type);
 
-       if (mes_reset_queue_pkt.queue_type == MES_QUEUE_TYPE_GFX) {
+       if (input->legacy_gfx) {
                mes_reset_queue_pkt.reset_legacy_gfx = 1;
                mes_reset_queue_pkt.pipe_id_lp = input->pipe_id;
                mes_reset_queue_pkt.queue_id_lp = input->queue_id;
@@ -887,7 +887,7 @@ static const struct amdgpu_mes_funcs mes_v12_0_funcs = {
        .suspend_gang = mes_v12_0_suspend_gang,
        .resume_gang = mes_v12_0_resume_gang,
        .misc_op = mes_v12_0_misc_op,
-       .reset_legacy_queue = mes_v12_0_reset_legacy_queue,
+       .reset_hw_queue = mes_v12_0_reset_hw_queue,
 };
 
 static int mes_v12_0_allocate_ucode_buffer(struct amdgpu_device *adev,