drm/amd/display: DCN35 set min dispclk to 50Mhz
authorNicholas Susanto <Nicholas.Susanto@amd.com>
Thu, 15 Aug 2024 22:45:21 +0000 (18:45 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 21 Aug 2024 02:14:13 +0000 (22:14 -0400)
[Why]

Causes hard hangs when resuming after display off on extended/duplicate
modes

[How]

Set the min dispclk to 50Mhz for DCN35

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Nicholas Susanto <Nicholas.Susanto@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

index e2d906327e2ed7a817bc6574dfea34c40b23a9cb..0ce9b40dfc68d923ce719703b1782a1849b75880 100644 (file)
@@ -305,6 +305,9 @@ void dcn35_update_clocks(struct clk_mgr *clk_mgr_base,
        if (new_clocks->dtbclk_en && !new_clocks->ref_dtbclk_khz)
                new_clocks->ref_dtbclk_khz = 600000;
 
+       if (dc->debug.min_disp_clk_khz > 0 && new_clocks->dispclk_khz < dc->debug.min_disp_clk_khz)
+               new_clocks->dispclk_khz = dc->debug.min_disp_clk_khz;
+
        /*
         * if it is safe to lower, but we are already in the lower state, we don't have to do anything
         * also if safe to lower is false, we just go in the higher state
index 5f3705f97bd74e041d38eb5ac052ef4319b31314..46ad684fe19205ac6f8d5f07f51956875bfddd77 100644 (file)
@@ -786,6 +786,7 @@ static const struct dc_debug_options debug_defaults_drv = {
        .disable_dmub_reallow_idle = false,
        .static_screen_wait_frames = 2,
        .disable_timeout = true,
+       .min_disp_clk_khz = 50000,
 };
 
 static const struct dc_panel_config panel_config_defaults = {