drm/amdgpu: switch to amdgpu_ras_late_init for nbio v7_4 (v2)
authorHawking Zhang <Hawking.Zhang@amd.com>
Thu, 29 Aug 2019 11:56:44 +0000 (19:56 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 13 Sep 2019 22:11:05 +0000 (17:11 -0500)
call helper function in late init phase to handle ras init
for nbio ip block

v2: init local var r to 0 in case the function return failure
on asics that don't have ras_late_init implementation

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/soc15.c

index d61d79435fa0c9a7f10b53c22c278770b27029c5..6588909de60bc598347c2bc6f46e5f7ccfee4ac9 100644 (file)
@@ -1215,11 +1215,15 @@ static int soc15_common_early_init(void *handle)
 static int soc15_common_late_init(void *handle)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       int r = 0;
 
        if (amdgpu_sriov_vf(adev))
                xgpu_ai_mailbox_get_irq(adev);
 
-       return 0;
+       if (adev->nbio.funcs->ras_late_init)
+               r = adev->nbio.funcs->ras_late_init(adev);
+
+       return r;
 }
 
 static int soc15_common_sw_init(void *handle)
@@ -1296,6 +1300,13 @@ static int soc15_common_hw_fini(void *handle)
        if (amdgpu_sriov_vf(adev))
                xgpu_ai_mailbox_put_irq(adev);
 
+       if (amdgpu_ras_is_supported(adev, adev->nbio.ras_if->block)) {
+               if (adev->nbio.funcs->init_ras_controller_interrupt)
+                       amdgpu_irq_put(adev, &adev->nbio.ras_controller_irq, 0);
+               if (adev->nbio.funcs->init_ras_err_event_athub_interrupt)
+                       amdgpu_irq_put(adev, &adev->nbio.ras_err_event_athub_irq, 0);
+       }
+
        return 0;
 }