clk: tegra: pll: Update warning message
authorRhyland Klein <rklein@nvidia.com>
Thu, 18 Jun 2015 21:28:21 +0000 (17:28 -0400)
committerThierry Reding <treding@nvidia.com>
Fri, 20 Nov 2015 17:04:35 +0000 (18:04 +0100)
Swap out the generic WARN_ON with a WARN which gives more information
about what is happening.

Reviewed-by: Benson Leung <bleung@chromium.org>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/clk/tegra/clk-pll.c

index 6c29ad7e15e7c15f1e9c5f719d3aa88a1cb3f87c..79f4dc230dee47482570e8fef75595f44335f176 100644 (file)
@@ -692,7 +692,8 @@ static unsigned long clk_pll_recalc_rate(struct clk_hw *hw,
 
        pdiv = _hw_to_p_div(hw, cfg.p);
        if (pdiv < 0) {
-               WARN_ON(1);
+               WARN(1, "Clock %s has invalid pdiv value : 0x%x\n",
+                       __clk_get_name(hw->clk), cfg.p);
                pdiv = 1;
        }