arm64: dts: imx8mm: move bulk of rtc properties to carrierboards

Move properties from SoM's dtsi to carrierboard's dts as they are
actually defined by the carrier board design.

Signed-off-by: Yannic Moog <y.moog@phytec.de>
Signed-off-by: Andrej Picej <andrej.picej@norik.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts
index 7aaf705c7e473a8a68067f04e59db20a40269145..17e5dd40b5d7d31f01041571160fbd0f5f2ab376 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts
@@ -221,6 +221,10 @@
 
 /* RTC */
 &rv3028 {
+       interrupt-parent = <&gpio1>;
+       interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+       pinctrl-0 = <&pinctrl_rtc>;
+       pinctrl-names = "default";
        aux-voltage-chargeable = <1>;
        trickle-resistor-ohms = <3000>;
        wakeup-source;
@@ -410,6 +414,12 @@
                >;
        };
 
+       pinctrl_rtc: rtcgrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3               0x1c0
+               >;
+       };
+
        pinctrl_tpm: tpmgrp {
                fsl,pins = <
                        MX8MM_IOMUXC_SD1_STROBE_GPIO2_IO11      0x140

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi
index cced82226c6d0c853b04499487780bf489965a58..672baba4c8d0527f2de002d49aa96d30a6ae2373 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi
@@ -301,10 +301,6 @@
        /* RTC */
        rv3028: rtc@52 {
                compatible = "microcrystal,rv3028";
-               interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
-               interrupt-parent = <&gpio1>;
-               pinctrl-names = "default";
-               pinctrl-0 = <&pinctrl_rtc>;
                reg = <0x52>;
        };
 };
@@ -377,12 +373,6 @@
                >;
        };
 
-       pinctrl_rtc: rtcgrp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3               0x1c0
-               >;
-       };
-
        pinctrl_sn65dsi83: sn65dsi83grp {
                fsl,pins = <
                        MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10              0x0

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts b/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts
index c9bf4ac254bb0f33b46a04a48325590c7165ae43..755cf9cacd227403f1bd2c2822b5920b1830618f 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts
@@ -215,6 +215,10 @@
 
 /* RTC */
 &rv3028 {
+       interrupt-parent = <&gpio1>;
+       interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+       pinctrl-0 = <&pinctrl_rtc>;
+       pinctrl-names = "default";
        aux-voltage-chargeable = <1>;
        trickle-resistor-ohms = <3000>;
        wakeup-source;
@@ -395,6 +399,12 @@
                >;
        };
 
+       pinctrl_rtc: rtcgrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3               0x1c0
+               >;
+       };
+
        pinctrl_tempsense: tempsensegrp {
                fsl,pins = <
                        MX8MM_IOMUXC_SAI3_TXFS_GPIO4_IO31       0x00