drm/i915/irq: hide display_irqs_enabled access

Move the check for display_irqs_enabled within vlv_display_irq_reset()
and vlv_display_irq_postinstall() to avoid looking at struct
intel_display members within i915 core irq code.

Within display irq code, vlv_display_irq_reset() may need to be called
with !display_irqs_enabled, so add a small wrapper.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ef43e26ebab7f84768391f5053c0eba44b647c89.1732102179.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index f0d3bdb5fc60fc50a2be54b7202390308e371d26..6467a208184ee4e6df1220a6a27a4aba5100f6cc 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -1481,7 +1481,7 @@ void bdw_disable_vblank(struct drm_crtc *_crtc)
                schedule_work(&display->irq.vblank_dc_work);
 }
 
-void vlv_display_irq_reset(struct drm_i915_private *dev_priv)
+static void _vlv_display_irq_reset(struct drm_i915_private *dev_priv)
 {
        struct intel_uncore *uncore = &dev_priv->uncore;
 
@@ -1499,6 +1499,12 @@ void vlv_display_irq_reset(struct drm_i915_private *dev_priv)
        dev_priv->irq_mask = ~0u;
 }
 
+void vlv_display_irq_reset(struct drm_i915_private *dev_priv)
+{
+       if (dev_priv->display.irq.display_irqs_enabled)
+               _vlv_display_irq_reset(dev_priv);
+}
+
 void i9xx_display_irq_reset(struct drm_i915_private *i915)
 {
        if (I915_HAS_HOTPLUG(i915)) {
@@ -1518,6 +1524,9 @@ void vlv_display_irq_postinstall(struct drm_i915_private *dev_priv)
        u32 enable_mask;
        enum pipe pipe;
 
+       if (!dev_priv->display.irq.display_irqs_enabled)
+               return;
+
        pipestat_mask = PIPE_CRC_DONE_INTERRUPT_STATUS;
 
        i915_enable_pipestat(dev_priv, PIPE_A, PIPE_GMBUS_INTERRUPT_STATUS);
@@ -1696,7 +1705,7 @@ void valleyview_enable_display_irqs(struct drm_i915_private *dev_priv)
        dev_priv->display.irq.display_irqs_enabled = true;
 
        if (intel_irqs_enabled(dev_priv)) {
-               vlv_display_irq_reset(dev_priv);
+               _vlv_display_irq_reset(dev_priv);
                vlv_display_irq_postinstall(dev_priv);
        }
 }
@@ -1711,7 +1720,7 @@ void valleyview_disable_display_irqs(struct drm_i915_private *dev_priv)
        dev_priv->display.irq.display_irqs_enabled = false;
 
        if (intel_irqs_enabled(dev_priv))
-               vlv_display_irq_reset(dev_priv);
+               _vlv_display_irq_reset(dev_priv);
 }
 
 void ilk_de_irq_postinstall(struct drm_i915_private *i915)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index f75cbf5b8a1caba71de8b74107422b187d895153..7920ad9585ae6ecab67cb8c28527d8f146d6d102 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -658,8 +658,7 @@ static void valleyview_irq_reset(struct drm_i915_private *dev_priv)
        gen5_gt_irq_reset(to_gt(dev_priv));
 
        spin_lock_irq(&dev_priv->irq_lock);
-       if (dev_priv->display.irq.display_irqs_enabled)
-               vlv_display_irq_reset(dev_priv);
+       vlv_display_irq_reset(dev_priv);
        spin_unlock_irq(&dev_priv->irq_lock);
 }
 
@@ -723,8 +722,7 @@ static void cherryview_irq_reset(struct drm_i915_private *dev_priv)
        gen2_irq_reset(uncore, GEN8_PCU_IRQ_REGS);
 
        spin_lock_irq(&dev_priv->irq_lock);
-       if (dev_priv->display.irq.display_irqs_enabled)
-               vlv_display_irq_reset(dev_priv);
+       vlv_display_irq_reset(dev_priv);
        spin_unlock_irq(&dev_priv->irq_lock);
 }
 
@@ -740,8 +738,7 @@ static void valleyview_irq_postinstall(struct drm_i915_private *dev_priv)
        gen5_gt_irq_postinstall(to_gt(dev_priv));
 
        spin_lock_irq(&dev_priv->irq_lock);
-       if (dev_priv->display.irq.display_irqs_enabled)
-               vlv_display_irq_postinstall(dev_priv);
+       vlv_display_irq_postinstall(dev_priv);
        spin_unlock_irq(&dev_priv->irq_lock);
 
        intel_uncore_write(&dev_priv->uncore, VLV_MASTER_IER, MASTER_INTERRUPT_ENABLE);
@@ -794,8 +791,7 @@ static void cherryview_irq_postinstall(struct drm_i915_private *dev_priv)
        gen8_gt_irq_postinstall(to_gt(dev_priv));
 
        spin_lock_irq(&dev_priv->irq_lock);
-       if (dev_priv->display.irq.display_irqs_enabled)
-               vlv_display_irq_postinstall(dev_priv);
+       vlv_display_irq_postinstall(dev_priv);
        spin_unlock_irq(&dev_priv->irq_lock);
 
        intel_uncore_write(&dev_priv->uncore, GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL);