ASoC: tegra: Update PLL rate for Tegra264

The PLLs should be set with a VCO frequency in the 900MHz – 1GHz range
to minimize jitter and ppm error for Tegra264. Add the PLLA rate
accordingly.

Therefore, use 983040000 frequency is for multiple of 8K frequencies
and 993484800 frequency is for multiple of 11.025K frequencies.

Signed-off-by: Sheetal <sheetal@nvidia.com>
Link: https://patch.msgid.link/20250512051747.1026770-7-sheetal@nvidia.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/sound/soc/tegra/tegra_audio_graph_card.c b/sound/soc/tegra/tegra_audio_graph_card.c
index 8b48813c2c595b1de87aaac2a93f1efe1c919c47..94b5ab77649b3619f855f53c062ab15d27bb5168 100644 (file)
--- a/sound/soc/tegra/tegra_audio_graph_card.c
+++ b/sound/soc/tegra/tegra_audio_graph_card.c
@@ -1,8 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0-only
+// SPDX-FileCopyrightText: Copyright (c) 2020-2025 NVIDIA CORPORATION. All rights reserved.
 //
 // tegra_audio_graph_card.c - Audio Graph based Tegra Machine Driver
-//
-// Copyright (c) 2020-2021 NVIDIA CORPORATION.  All rights reserved.
 
 #include <linux/math64.h>
 #include <linux/module.h>
@@ -232,11 +231,22 @@ static const struct tegra_audio_cdata tegra186_data = {
        .plla_out0_rates[x11_RATE] = 45158400,
 };
 
+static const struct tegra_audio_cdata tegra264_data = {
+       /* PLLA1 */
+       .plla_rates[x8_RATE] = 983040000,
+       .plla_rates[x11_RATE] = 993484800,
+       /* PLLA1_OUT1 */
+       .plla_out0_rates[x8_RATE] = 49152000,
+       .plla_out0_rates[x11_RATE] = 45158400,
+};
+
 static const struct of_device_id graph_of_tegra_match[] = {
        { .compatible = "nvidia,tegra210-audio-graph-card",
          .data = &tegra210_data },
        { .compatible = "nvidia,tegra186-audio-graph-card",
          .data = &tegra186_data },
+       { .compatible = "nvidia,tegra264-audio-graph-card",
+         .data = &tegra264_data },
        {},
 };
 MODULE_DEVICE_TABLE(of, graph_of_tegra_match);